Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25004 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2005-12-24 09:48:35 +00:00
parent c687b48741
commit e4672aa5b4

View File

@ -57,9 +57,9 @@ void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
Opc = X86::MOV16mr;
} else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) {
Opc = X86::FpST64m;
} else if (RC == &X86::V4F4RegClass) {
} else if (RC == &X86::FR32RegClass || RC == &X86::V4F4RegClass) {
Opc = X86::MOVSSmr;
} else if (RC == &X86::V2F8RegClass) {
} else if (RC == &X86::FR64RegClass || RC == &X86::V2F8RegClass) {
Opc = X86::MOVSDmr;
} else {
assert(0 && "Unknown regclass");
@ -81,9 +81,9 @@ void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
Opc = X86::MOV16rm;
} else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) {
Opc = X86::FpLD64m;
} else if (RC == &X86::V4F4RegClass) {
} else if (RC == &X86::FR32RegClass || RC == &X86::V4F4RegClass) {
Opc = X86::MOVSSrm;
} else if (RC == &X86::V2F8RegClass) {
} else if (RC == &X86::FR64RegClass || RC == &X86::V2F8RegClass) {
Opc = X86::MOVSDrm;
} else {
assert(0 && "Unknown regclass");
@ -105,9 +105,9 @@ void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
Opc = X86::MOV16rr;
} else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) {
Opc = X86::FpMOV;
} else if (RC == &X86::V4F4RegClass) {
} else if (RC == &X86::FR32RegClass || RC == &X86::V4F4RegClass) {
Opc = X86::MOVSSrr;
} else if (RC == &X86::V2F8RegClass) {
} else if (RC == &X86::FR64RegClass || RC == &X86::V2F8RegClass) {
Opc = X86::MOVSDrr;
} else {
assert(0 && "Unknown regclass");