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[X86][SSE] Regenerate multiple combine tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281973 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim
parent
c091990663
commit
e4f1232c49
@ -1,4 +1,5 @@
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; RUN: llc < %s -mattr=sse2 -mtriple=i386-unknown-linux-gnu | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=sse2 | FileCheck %s
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; Source file looks something like this:
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;
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@ -28,18 +29,21 @@
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; movl $11, 2020(%esi,%ecx,4)
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; movl $22, 2080(%edx,%eax)
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; movl $33, 10080(%edx,%eax)
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;
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; CHECK-LABEL: testCombineMultiplies
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; CHECK: imull $400, [[ARG1:%[a-z]+]], [[MUL:%[a-z]+]] # imm = 0x190
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; CHECK-NEXT: leal ([[ARG2:%[a-z]+]],[[MUL]]), [[LEA:%[a-z]+]]
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; CHECK-NEXT: movl $11, {{[0-9]+}}([[LEA]],[[ARG1]],4)
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; CHECK-NEXT: movl $22, {{[0-9]+}}([[ARG2]],[[MUL]])
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; CHECK-NEXT: movl $33, {{[0-9]+}}([[ARG2]],[[MUL]])
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; CHECK: retl
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;
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; Function Attrs: nounwind
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define void @testCombineMultiplies([100 x i32]* nocapture %a, i32 %lll) {
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define void @testCombineMultiplies([100 x i32]* nocapture %a, i32 %lll) nounwind {
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; CHECK-LABEL: testCombineMultiplies:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: imull $400, %ecx, %edx # imm = 0x190
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; CHECK-NEXT: leal (%eax,%edx), %esi
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; CHECK-NEXT: movl $11, 2020(%esi,%ecx,4)
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; CHECK-NEXT: movl $22, 2080(%eax,%edx)
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; CHECK-NEXT: movl $33, 10080(%eax,%edx)
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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entry:
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%add = add nsw i32 %lll, 5
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%arrayidx1 = getelementptr inbounds [100 x i32], [100 x i32]* %a, i32 %add, i32 %add
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@ -92,31 +96,31 @@ entry:
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; We should have a single multiply for "v1 * {22, 22, 22, 22}" (made up of two
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; pmuludq instructions), followed by two adds. Without this optimization, we'd
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; do 2 adds, followed by 2 multiplies (i.e. 4 pmuludq instructions).
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;
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; CHECK-LABEL: testCombineMultiplies_splat
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; CHECK: movdqa .LCPI1_0, [[C11:%xmm[0-9]]]
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; CHECK-NEXT: paddd %xmm0, [[C11]]
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; CHECK-NEXT: movdqa .LCPI1_1, [[C22:%xmm[0-9]]]
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; CHECK-NEXT: pshufd $245, %xmm0, [[T1:%xmm[0-9]]]
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; CHECK-NEXT: pmuludq [[C22]], [[T2:%xmm[0-9]]]
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; CHECK-NEXT: pshufd $232, [[T2]], [[T3:%xmm[0-9]]]
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; CHECK-NEXT: pmuludq [[C22]], [[T4:%xmm[0-9]]]
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; CHECK-NEXT: pshufd $232, [[T4]], [[T5:%xmm[0-9]]]
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; CHECK-NEXT: punpckldq [[T5]], [[T6:%xmm[0-9]]]
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; CHECK-NEXT: movdqa .LCPI1_2, [[C242:%xmm[0-9]]]
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; CHECK-NEXT: paddd [[T6]], [[C242]]
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; CHECK-NEXT: paddd .LCPI1_3, [[C726:%xmm[0-9]]]
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; CHECK-NEXT: movdqa [[C242]], v2
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; CHECK-NEXT: [[C726]], v3
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; CHECK-NEXT: [[C11]], x
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; CHECK-NEXT: retl
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@v2 = common global <4 x i32> zeroinitializer, align 16
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@v3 = common global <4 x i32> zeroinitializer, align 16
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@x = common global <4 x i32> zeroinitializer, align 16
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; Function Attrs: nounwind
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define void @testCombineMultiplies_splat(<4 x i32> %v1) {
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define void @testCombineMultiplies_splat(<4 x i32> %v1) nounwind {
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; CHECK-LABEL: testCombineMultiplies_splat:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [11,11,11,11]
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; CHECK-NEXT: paddd %xmm0, %xmm1
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; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [22,22,22,22]
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; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm2, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; CHECK-NEXT: pmuludq %xmm2, %xmm3
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
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; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [242,242,242,242]
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; CHECK-NEXT: paddd %xmm0, %xmm2
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; CHECK-NEXT: paddd {{\.LCPI.*}}, %xmm0
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; CHECK-NEXT: movdqa %xmm2, v2
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; CHECK-NEXT: movdqa %xmm0, v3
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; CHECK-NEXT: movdqa %xmm1, x
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; CHECK-NEXT: retl
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entry:
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%add1 = add <4 x i32> %v1, <i32 11, i32 11, i32 11, i32 11>
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%mul1 = mul <4 x i32> %add1, <i32 22, i32 22, i32 22, i32 22>
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@ -130,27 +134,28 @@ entry:
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; Finally, check the non-splatted vector case. This is very similar
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; to the previous test case, except for the vector values.
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;
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; CHECK-LABEL: testCombineMultiplies_non_splat
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; CHECK: movdqa .LCPI2_0, [[C11:%xmm[0-9]]]
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; CHECK-NEXT: paddd %xmm0, [[C11]]
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; CHECK-NEXT: movdqa .LCPI2_1, [[C22:%xmm[0-9]]]
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; CHECK-NEXT: pshufd $245, %xmm0, [[T1:%xmm[0-9]]]
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; CHECK-NEXT: pmuludq [[C22]], [[T2:%xmm[0-9]]]
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; CHECK-NEXT: pshufd $232, [[T2]], [[T3:%xmm[0-9]]]
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; CHECK-NEXT: pshufd $245, [[C22]], [[T7:%xmm[0-9]]]
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; CHECK-NEXT: pmuludq [[T1]], [[T7]]
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; CHECK-NEXT: pshufd $232, [[T7]], [[T5:%xmm[0-9]]]
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; CHECK-NEXT: punpckldq [[T5]], [[T6:%xmm[0-9]]]
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; CHECK-NEXT: movdqa .LCPI2_2, [[C242:%xmm[0-9]]]
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; CHECK-NEXT: paddd [[T6]], [[C242]]
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; CHECK-NEXT: paddd .LCPI2_3, [[C726:%xmm[0-9]]]
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; CHECK-NEXT: movdqa [[C242]], v2
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; CHECK-NEXT: [[C726]], v3
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; CHECK-NEXT: [[C11]], x
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; CHECK-NEXT: retl
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; Function Attrs: nounwind
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define void @testCombineMultiplies_non_splat(<4 x i32> %v1) {
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define void @testCombineMultiplies_non_splat(<4 x i32> %v1) nounwind {
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; CHECK-LABEL: testCombineMultiplies_non_splat:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [11,22,33,44]
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; CHECK-NEXT: paddd %xmm0, %xmm1
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; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [22,33,44,55]
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; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm2, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
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; CHECK-NEXT: pmuludq %xmm3, %xmm2
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
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; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
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; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [242,726,1452,2420]
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; CHECK-NEXT: paddd %xmm0, %xmm2
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; CHECK-NEXT: paddd {{\.LCPI.*}}, %xmm0
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; CHECK-NEXT: movdqa %xmm2, v2
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; CHECK-NEXT: movdqa %xmm0, v3
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; CHECK-NEXT: movdqa %xmm1, x
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; CHECK-NEXT: retl
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entry:
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%add1 = add <4 x i32> %v1, <i32 11, i32 22, i32 33, i32 44>
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%mul1 = mul <4 x i32> %add1, <i32 22, i32 33, i32 44, i32 55>
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