From e66b7ebfb426c7ed9bc911e9708321e2d8510b41 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 1 Nov 2010 23:57:23 +0000 Subject: [PATCH] fix computation of ambiguous instructions to not ignore the mnemonic. FWIW, X86 has 254 ambiguous instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117979 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/AsmMatcherEmitter.cpp | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp index 7f653a3f7d9..532a7b5f175 100644 --- a/utils/TableGen/AsmMatcherEmitter.cpp +++ b/utils/TableGen/AsmMatcherEmitter.cpp @@ -411,6 +411,10 @@ struct MatchableInfo { /// ambiguously match the same set of operands as \arg RHS (without being a /// strictly superior match). bool CouldMatchAmiguouslyWith(const MatchableInfo &RHS) { + // The primary comparator is the instruction mnemonic. + if (Tokens[0] != RHS.Tokens[0]) + return false; + // The number of operands is unambiguous. if (Operands.size() != RHS.Operands.size()) return false; @@ -849,8 +853,8 @@ BuildRegisterClasses(SmallPtrSet &SingletonRegisters) { } void AsmMatcherInfo::BuildOperandClasses() { - std::vector AsmOperands; - AsmOperands = Records.getAllDerivedDefinitions("AsmOperandClass"); + std::vector AsmOperands = + Records.getAllDerivedDefinitions("AsmOperandClass"); // Pre-populate AsmOperandClasses map. for (std::vector::iterator it = AsmOperands.begin(), @@ -1127,7 +1131,7 @@ static void EmitConvertToMCInst(CodeGenTarget &Target, } } - std::sort(MIOperandList.begin(), MIOperandList.end()); + array_pod_sort(MIOperandList.begin(), MIOperandList.end()); // Compute the total number of operands. unsigned NumMIOperands = 0;