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[AArch64 MachineCombine] Enhance/Add support for general reassociation to reduce the critical path
Allow fadd/fmul to be reassociated in aarch64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257024 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Haicheng Wu
parent
82a04b17ae
commit
e6f663968c
@ -2487,15 +2487,36 @@ static bool canCombineWithMUL(MachineBasicBlock &MBB, MachineOperand &MO,
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return true;
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}
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/// Return true when there is potentially a faster code sequence
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/// for an instruction chain ending in \p Root. All potential patterns are
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/// listed
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/// in the \p Pattern vector. Pattern should be sorted in priority order since
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/// the pattern evaluator stops checking as soon as it finds a faster sequence.
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// TODO: There are many more machine instruction opcodes to match:
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// 1. Other data types (integer, vectors)
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// 2. Other math / logic operations (xor, or)
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// 3. Other forms of the same operation (intrinsics and other variants)
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bool AArch64InstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst) const {
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switch (Inst.getOpcode()) {
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case AArch64::FADDDrr:
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case AArch64::FADDSrr:
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case AArch64::FADDv2f32:
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case AArch64::FADDv2f64:
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case AArch64::FADDv4f32:
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case AArch64::FMULDrr:
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case AArch64::FMULSrr:
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case AArch64::FMULX32:
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case AArch64::FMULX64:
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case AArch64::FMULXv2f32:
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case AArch64::FMULXv2f64:
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case AArch64::FMULXv4f32:
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case AArch64::FMULv2f32:
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case AArch64::FMULv2f64:
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case AArch64::FMULv4f32:
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return Inst.getParent()->getParent()->getTarget().Options.UnsafeFPMath;
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default:
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return false;
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}
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}
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bool AArch64InstrInfo::getMachineCombinerPatterns(
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MachineInstr &Root,
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SmallVectorImpl<MachineCombinerPattern> &Patterns) const {
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/// Find instructions that can be turned into madd.
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static bool getMaddPatterns(MachineInstr &Root,
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SmallVectorImpl<MachineCombinerPattern> &Patterns) {
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unsigned Opc = Root.getOpcode();
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MachineBasicBlock &MBB = *Root.getParent();
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bool Found = false;
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@ -2600,6 +2621,20 @@ bool AArch64InstrInfo::getMachineCombinerPatterns(
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return Found;
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}
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/// Return true when there is potentially a faster code sequence for an
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/// instruction chain ending in \p Root. All potential patterns are listed in
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/// the \p Pattern vector. Pattern should be sorted in priority order since the
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/// pattern evaluator stops checking as soon as it finds a faster sequence.
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bool AArch64InstrInfo::getMachineCombinerPatterns(
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MachineInstr &Root,
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SmallVectorImpl<MachineCombinerPattern> &Patterns) const {
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if (getMaddPatterns(Root, Patterns))
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return true;
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return TargetInstrInfo::getMachineCombinerPatterns(Root, Patterns);
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}
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/// genMadd - Generate madd instruction and combine mul and add.
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/// Example:
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/// MUL I=A,B,0
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@ -2713,8 +2748,10 @@ void AArch64InstrInfo::genAlternativeCodeSequence(
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unsigned Opc;
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switch (Pattern) {
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default:
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// signal error.
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break;
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// Reassociate instructions.
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TargetInstrInfo::genAlternativeCodeSequence(Root, Pattern, InsInstrs,
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DelInstrs, InstrIdxForVirtReg);
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return;
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case MachineCombinerPattern::MULADDW_OP1:
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case MachineCombinerPattern::MULADDX_OP1:
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// MUL I=A,B,0
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@ -169,7 +169,9 @@ public:
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bool getMachineCombinerPatterns(MachineInstr &Root,
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SmallVectorImpl<MachineCombinerPattern> &Patterns)
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const override;
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/// Return true when Inst is associative and commutative so that it can be
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/// reassociated.
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bool isAssociativeAndCommutative(const MachineInstr &Inst) const override;
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/// When getMachineCombinerPatterns() finds patterns, this function generates
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/// the instructions that could replace the original code sequence
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void genAlternativeCodeSequence(
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258
test/CodeGen/AArch64/machine-combiner.ll
Normal file
258
test/CodeGen/AArch64/machine-combiner.ll
Normal file
@ -0,0 +1,258 @@
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; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=cortex-a57 -enable-unsafe-fp-math < %s | FileCheck %s
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; Verify that the first two adds are independent regardless of how the inputs are
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; commuted. The destination registers are used as source registers for the third add.
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define float @reassociate_adds1(float %x0, float %x1, float %x2, float %x3) {
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; CHECK-LABEL: reassociate_adds1:
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; CHECK: fadd s0, s0, s1
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; CHECK-NEXT: fadd s1, s2, s3
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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%t0 = fadd float %x0, %x1
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%t1 = fadd float %t0, %x2
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%t2 = fadd float %t1, %x3
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ret float %t2
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}
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define float @reassociate_adds2(float %x0, float %x1, float %x2, float %x3) {
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; CHECK-LABEL: reassociate_adds2:
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; CHECK: fadd s0, s0, s1
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; CHECK-NEXT: fadd s1, s2, s3
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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%t0 = fadd float %x0, %x1
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%t1 = fadd float %x2, %t0
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%t2 = fadd float %t1, %x3
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ret float %t2
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}
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define float @reassociate_adds3(float %x0, float %x1, float %x2, float %x3) {
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; CHECK-LABEL: reassociate_adds3:
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; CHECK: s0, s0, s1
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; CHECK-NEXT: s1, s2, s3
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; CHECK-NEXT: s0, s0, s1
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; CHECK-NEXT: ret
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%t0 = fadd float %x0, %x1
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%t1 = fadd float %t0, %x2
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%t2 = fadd float %x3, %t1
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ret float %t2
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}
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define float @reassociate_adds4(float %x0, float %x1, float %x2, float %x3) {
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; CHECK-LABEL: reassociate_adds4:
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; CHECK: s0, s0, s1
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; CHECK-NEXT: s1, s2, s3
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; CHECK-NEXT: s0, s0, s1
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; CHECK-NEXT: ret
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%t0 = fadd float %x0, %x1
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%t1 = fadd float %x2, %t0
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%t2 = fadd float %x3, %t1
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ret float %t2
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}
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; Verify that we reassociate some of these ops. The optimal balanced tree of adds is not
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; produced because that would cost more compile time.
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define float @reassociate_adds5(float %x0, float %x1, float %x2, float %x3, float %x4, float %x5, float %x6, float %x7) {
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; CHECK-LABEL: reassociate_adds5:
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; CHECK: fadd s0, s0, s1
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; CHECK-NEXT: fadd s1, s2, s3
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: fadd s1, s4, s5
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; CHECK-NEXT: fadd s1, s1, s6
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: fadd s0, s0, s7
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; CHECK-NEXT: ret
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%t0 = fadd float %x0, %x1
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%t1 = fadd float %t0, %x2
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%t2 = fadd float %t1, %x3
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%t3 = fadd float %t2, %x4
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%t4 = fadd float %t3, %x5
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%t5 = fadd float %t4, %x6
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%t6 = fadd float %t5, %x7
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ret float %t6
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}
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; Verify that we only need two associative operations to reassociate the operands.
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; Also, we should reassociate such that the result of the high latency division
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; is used by the final 'add' rather than reassociating the %x3 operand with the
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; division. The latter reassociation would not improve anything.
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define float @reassociate_adds6(float %x0, float %x1, float %x2, float %x3) {
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; CHECK-LABEL: reassociate_adds6:
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; CHECK: fdiv s0, s0, s1
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; CHECK-NEXT: fadd s1, s2, s3
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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%t0 = fdiv float %x0, %x1
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%t1 = fadd float %x2, %t0
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%t2 = fadd float %x3, %t1
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ret float %t2
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}
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; Verify that scalar single-precision multiplies are reassociated.
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define float @reassociate_muls1(float %x0, float %x1, float %x2, float %x3) {
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; CHECK-LABEL: reassociate_muls1:
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; CHECK: fdiv s0, s0, s1
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; CHECK-NEXT: fmul s1, s2, s3
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; CHECK-NEXT: fmul s0, s0, s1
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; CHECK-NEXT: ret
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%t0 = fdiv float %x0, %x1
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%t1 = fmul float %x2, %t0
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%t2 = fmul float %x3, %t1
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ret float %t2
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}
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; Verify that scalar double-precision adds are reassociated.
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define double @reassociate_adds_double(double %x0, double %x1, double %x2, double %x3) {
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; CHECK-LABEL: reassociate_adds_double:
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; CHECK: fdiv d0, d0, d1
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; CHECK-NEXT: fadd d1, d2, d3
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; CHECK-NEXT: fadd d0, d0, d1
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; CHECK-NEXT: ret
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%t0 = fdiv double %x0, %x1
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%t1 = fadd double %x2, %t0
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%t2 = fadd double %x3, %t1
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ret double %t2
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}
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; Verify that scalar double-precision multiplies are reassociated.
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define double @reassociate_muls_double(double %x0, double %x1, double %x2, double %x3) {
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; CHECK-LABEL: reassociate_muls_double:
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; CHECK: fdiv d0, d0, d1
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; CHECK-NEXT: fmul d1, d2, d3
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; CHECK-NEXT: fmul d0, d0, d1
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; CHECK-NEXT: ret
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%t0 = fdiv double %x0, %x1
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%t1 = fmul double %x2, %t0
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%t2 = fmul double %x3, %t1
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ret double %t2
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}
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; Verify that we reassociate vector instructions too.
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define <4 x float> @vector_reassociate_adds1(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {
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; CHECK-LABEL: vector_reassociate_adds1:
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; CHECK: fadd v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: fadd v1.4s, v2.4s, v3.4s
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; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%t0 = fadd <4 x float> %x0, %x1
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%t1 = fadd <4 x float> %t0, %x2
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%t2 = fadd <4 x float> %t1, %x3
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ret <4 x float> %t2
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}
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define <4 x float> @vector_reassociate_adds2(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {
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; CHECK-LABEL: vector_reassociate_adds2:
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; CHECK: fadd v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: fadd v1.4s, v2.4s, v3.4s
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; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s
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%t0 = fadd <4 x float> %x0, %x1
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%t1 = fadd <4 x float> %x2, %t0
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%t2 = fadd <4 x float> %t1, %x3
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ret <4 x float> %t2
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}
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define <4 x float> @vector_reassociate_adds3(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {
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; CHECK-LABEL: vector_reassociate_adds3:
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; CHECK: fadd v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: fadd v1.4s, v2.4s, v3.4s
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; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s
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%t0 = fadd <4 x float> %x0, %x1
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%t1 = fadd <4 x float> %t0, %x2
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%t2 = fadd <4 x float> %x3, %t1
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ret <4 x float> %t2
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}
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define <4 x float> @vector_reassociate_adds4(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {
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; CHECK-LABEL: vector_reassociate_adds4:
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; CHECK: fadd v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: fadd v1.4s, v2.4s, v3.4s
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; CHECK-NEXT: fadd v0.4s, v0.4s, v1.4s
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%t0 = fadd <4 x float> %x0, %x1
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%t1 = fadd <4 x float> %x2, %t0
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%t2 = fadd <4 x float> %x3, %t1
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ret <4 x float> %t2
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}
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; Verify that 128-bit vector single-precision multiplies are reassociated.
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define <4 x float> @reassociate_muls_v4f32(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {
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; CHECK-LABEL: reassociate_muls_v4f32:
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; CHECK: fadd v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: fmul v1.4s, v2.4s, v3.4s
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; CHECK-NEXT: fmul v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: ret
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%t0 = fadd <4 x float> %x0, %x1
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%t1 = fmul <4 x float> %x2, %t0
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%t2 = fmul <4 x float> %x3, %t1
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ret <4 x float> %t2
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}
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; Verify that 128-bit vector double-precision multiplies are reassociated.
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define <2 x double> @reassociate_muls_v2f64(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, <2 x double> %x3) {
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; CHECK-LABEL: reassociate_muls_v2f64:
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; CHECK: fadd v0.2d, v0.2d, v1.2d
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; CHECK-NEXT: fmul v1.2d, v2.2d, v3.2d
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; CHECK-NEXT: fmul v0.2d, v0.2d, v1.2d
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; CHECK-NEXT: ret
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%t0 = fadd <2 x double> %x0, %x1
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%t1 = fmul <2 x double> %x2, %t0
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%t2 = fmul <2 x double> %x3, %t1
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ret <2 x double> %t2
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}
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; PR25016: https://llvm.org/bugs/show_bug.cgi?id=25016
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; Verify that reassociation is not happening needlessly or wrongly.
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declare double @bar()
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define double @reassociate_adds_from_calls() {
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; CHECK-LABEL: reassociate_adds_from_calls:
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; CHECK: bl bar
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; CHECK-NEXT: mov v8.16b, v0.16b
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; CHECK-NEXT: bl bar
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; CHECK-NEXT: mov v9.16b, v0.16b
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; CHECK-NEXT: bl bar
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; CHECK-NEXT: mov v10.16b, v0.16b
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; CHECK-NEXT: bl bar
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; CHECK: fadd d1, d8, d9
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; CHECK-NEXT: fadd d0, d10, d0
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; CHECK-NEXT: fadd d0, d1, d0
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%x0 = call double @bar()
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%x1 = call double @bar()
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%x2 = call double @bar()
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%x3 = call double @bar()
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%t0 = fadd double %x0, %x1
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%t1 = fadd double %t0, %x2
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%t2 = fadd double %t1, %x3
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ret double %t2
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}
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define double @already_reassociated() {
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; CHECK-LABEL: already_reassociated:
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; CHECK: bl bar
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; CHECK-NEXT: mov v8.16b, v0.16b
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; CHECK-NEXT: bl bar
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; CHECK-NEXT: mov v9.16b, v0.16b
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; CHECK-NEXT: bl bar
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; CHECK-NEXT: mov v10.16b, v0.16b
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; CHECK-NEXT: bl bar
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; CHECK: fadd d1, d8, d9
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; CHECK-NEXT: fadd d0, d10, d0
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; CHECK-NEXT: fadd d0, d1, d0
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%x0 = call double @bar()
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%x1 = call double @bar()
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%x2 = call double @bar()
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%x3 = call double @bar()
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%t0 = fadd double %x0, %x1
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%t1 = fadd double %x2, %x3
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%t2 = fadd double %t0, %t1
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ret double %t2
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}
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