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LR is a 32-bit int reg

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15273 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2004-07-27 17:15:32 +00:00
parent 53f567817c
commit e862f306fb
1 changed files with 2 additions and 2 deletions
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4
lib/Target/PowerPC/PPCRegisterInfo.td
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@ -79,11 +79,11 @@ def GPRC :
RegisterClass<i32, 4, RegisterClass<i32, 4,
[R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, [R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12,
R31, R30, R29, R28, R27, R26, R25, R24, R23, R22, R21, R20, R19, R18, R17, R31, R30, R29, R28, R27, R26, R25, R24, R23, R22, R21, R20, R19, R18, R17,
R16, R15, R14, R13, R0, R1]> R16, R15, R14, R13, R0, R1, LR]>
{ {
let Methods = [{ let Methods = [{
iterator allocation_order_end(MachineFunction &MF) const { iterator allocation_order_end(MachineFunction &MF) const {
return end()-2; return end()-3;
} }
}]; }];
} }