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R600/SI: Custom lower i64 sign_extend

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183136 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2013-06-03 17:40:03 +00:00
parent 17e8ad67f0
commit e86f9d70ca
3 changed files with 31 additions and 0 deletions
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18
lib/Target/R600/SIISelLowering.cpp
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@ -74,6 +74,8 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
setOperationAction(ISD::SIGN_EXTEND, MVT::i64, Custom);
setTargetDAGCombine(ISD::SELECT_CC);
setTargetDAGCombine(ISD::SETCC);
@ -266,6 +268,7 @@ SDValue SITargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
case ISD::BRCOND: return LowerBRCOND(Op, DAG);
case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG);
}
return SDValue();
}
@ -383,6 +386,21 @@ SDValue SITargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
return DAG.getNode(ISD::SELECT, DL, VT, Cond, True, False);
}
SDValue SITargetLowering::LowerSIGN_EXTEND(SDValue Op,
SelectionDAG &DAG) const {
EVT VT = Op.getValueType();
SDLoc DL(Op);
if (VT != MVT::i64) {
return SDValue();
}
SDValue Hi = DAG.getNode(ISD::SRA, DL, MVT::i32, Op.getOperand(0),
DAG.getConstant(31, MVT::i32));
return DAG.getNode(ISD::BUILD_PAIR, DL, VT, Op.getOperand(0), Hi);
}
//===----------------------------------------------------------------------===//
// Custom DAG optimizations
//===----------------------------------------------------------------------===//

1
lib/Target/R600/SIISelLowering.h
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@ -25,6 +25,7 @@ class SITargetLowering : public AMDGPUTargetLowering {
const TargetRegisterInfo * TRI;
SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
bool foldImm(SDValue &Operand, int32_t &Immediate,

12
test/CodeGen/R600/sign_extend.ll Normal file
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@ -0,0 +1,12 @@
; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
; CHECK: V_ASHR
define void @test(i64 addrspace(1)* %out, i32 %a, i32 %b, i32 %c) {
entry:
%0 = mul i32 %a, %b
%1 = add i32 %0, %c
%2 = sext i32 %1 to i64
store i64 %2, i64 addrspace(1)* %out
ret void
}