RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-12-26 22:26:16 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[FastISel][AArch64] Factor out scale factor calculation. NFC.

Browse Source 
Factor out the code that determines the implicit scale factor of memory
operations for a given value type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218652 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Juergen Ributzka 2014-09-30 00:49:54 +00:00
parent c27ddda8ce
commit e8a9706eda
1 changed files with 29 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

64
lib/Target/AArch64/AArch64FastISel.cpp
View File

@ -255,6 +255,26 @@ public:
#include "AArch64GenCallingConv.inc" #include "AArch64GenCallingConv.inc"
/// \brief Determine the implicit scale factor that is applied by a memory
/// operation for a given value type.
static unsigned getImplicitScaleFactor(MVT VT) {
switch (VT.SimpleTy) {
default:
return 0; // invalid
case MVT::i1: // fall-through
case MVT::i8:
return 1;
case MVT::i16:
return 2;
case MVT::i32: // fall-through
case MVT::f32:
return 4;
case MVT::i64: // fall-through
case MVT::f64:
return 8;
}
}
CCAssignFn *AArch64FastISel::CCAssignFnForCall(CallingConv::ID CC) const { CCAssignFn *AArch64FastISel::CCAssignFnForCall(CallingConv::ID CC) const {
if (CC == CallingConv::WebKit_JS) if (CC == CallingConv::WebKit_JS)
return CC_AArch64_WebKit_JS; return CC_AArch64_WebKit_JS;
@ -839,17 +859,9 @@ bool AArch64FastISel::isValueAvailable(const Value *V) const {
} }
bool AArch64FastISel::simplifyAddress(Address &Addr, MVT VT) { bool AArch64FastISel::simplifyAddress(Address &Addr, MVT VT) {
unsigned ScaleFactor; unsigned ScaleFactor = getImplicitScaleFactor(VT);
switch (VT.SimpleTy) { if (!ScaleFactor)
default: return false; return false;
case MVT::i1: // fall-through
case MVT::i8: ScaleFactor = 1; break;
case MVT::i16: ScaleFactor = 2; break;
case MVT::i32: // fall-through
case MVT::f32: ScaleFactor = 4; break;
case MVT::i64: // fall-through
case MVT::f64: ScaleFactor = 8; break;
}
bool ImmediateOffsetNeedsLowering = false; bool ImmediateOffsetNeedsLowering = false;
bool RegisterOffsetNeedsLowering = false; bool RegisterOffsetNeedsLowering = false;
@ -1561,17 +1573,9 @@ bool AArch64FastISel::emitLoad(MVT VT, unsigned &ResultReg, Address Addr,
if (!simplifyAddress(Addr, VT)) if (!simplifyAddress(Addr, VT))
return false; return false;
unsigned ScaleFactor; unsigned ScaleFactor = getImplicitScaleFactor(VT);
switch (VT.SimpleTy) { if (!ScaleFactor)
default: llvm_unreachable("Unexpected value type."); llvm_unreachable("Unexpected value type.");
case MVT::i1: // fall-through
case MVT::i8: ScaleFactor = 1; break;
case MVT::i16: ScaleFactor = 2; break;
case MVT::i32: // fall-through
case MVT::f32: ScaleFactor = 4; break;
case MVT::i64: // fall-through
case MVT::f64: ScaleFactor = 8; break;
}
// Negative offsets require unscaled, 9-bit, signed immediate offsets. // Negative offsets require unscaled, 9-bit, signed immediate offsets.
// Otherwise, we try using scaled, 12-bit, unsigned immediate offsets. // Otherwise, we try using scaled, 12-bit, unsigned immediate offsets.
@ -1711,17 +1715,9 @@ bool AArch64FastISel::emitStore(MVT VT, unsigned SrcReg, Address Addr,
if (!simplifyAddress(Addr, VT)) if (!simplifyAddress(Addr, VT))
return false; return false;
unsigned ScaleFactor; unsigned ScaleFactor = getImplicitScaleFactor(VT);
switch (VT.SimpleTy) { if (!ScaleFactor)
default: llvm_unreachable("Unexpected value type."); llvm_unreachable("Unexpected value type.");
case MVT::i1: // fall-through
case MVT::i8: ScaleFactor = 1; break;
case MVT::i16: ScaleFactor = 2; break;
case MVT::i32: // fall-through
case MVT::f32: ScaleFactor = 4; break;
case MVT::i64: // fall-through
case MVT::f64: ScaleFactor = 8; break;
}
// Negative offsets require unscaled, 9-bit, signed immediate offsets. // Negative offsets require unscaled, 9-bit, signed immediate offsets.
// Otherwise, we try using scaled, 12-bit, unsigned immediate offsets. // Otherwise, we try using scaled, 12-bit, unsigned immediate offsets.
@ -1731,7 +1727,6 @@ bool AArch64FastISel::emitStore(MVT VT, unsigned SrcReg, Address Addr,
ScaleFactor = 1; ScaleFactor = 1;
} }
static const unsigned OpcTable[4][6] = { static const unsigned OpcTable[4][6] = {
{ AArch64::STURBBi, AArch64::STURHHi, AArch64::STURWi, AArch64::STURXi, { AArch64::STURBBi, AArch64::STURHHi, AArch64::STURWi, AArch64::STURXi,
AArch64::STURSi, AArch64::STURDi }, AArch64::STURSi, AArch64::STURDi },
@ -1741,7 +1736,6 @@ bool AArch64FastISel::emitStore(MVT VT, unsigned SrcReg, Address Addr,
AArch64::STRSroX, AArch64::STRDroX }, AArch64::STRSroX, AArch64::STRDroX },
{ AArch64::STRBBroW, AArch64::STRHHroW, AArch64::STRWroW, AArch64::STRXroW, { AArch64::STRBBroW, AArch64::STRHHroW, AArch64::STRWroW, AArch64::STRXroW,
AArch64::STRSroW, AArch64::STRDroW } AArch64::STRSroW, AArch64::STRDroW }
}; };
unsigned Opc; unsigned Opc;