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Pass endian information to constructors. Define separate functions to create
objects for big endian and little endian targets. Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151788 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -70,10 +70,16 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
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namespace {
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class MipsAsmBackend : public MCAsmBackend {
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Triple::OSType OSType;
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bool IsLittle; // Big or little endian
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public:
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uint8_t OSABI;
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MipsAsmBackend(const Target &T, uint8_t OSABI_) :
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MCAsmBackend(), OSABI(OSABI_) {}
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MipsAsmBackend(const Target &T, Triple::OSType _OSType, bool _isLittle) :
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MCAsmBackend(), OSType(_OSType), IsLittle(_isLittle) {}
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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return createMipsELFObjectWriter(OS, OSType, IsLittle);
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}
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/// ApplyFixup - Apply the \arg Value for given \arg Fixup into the provided
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/// data fragment, at the offset specified by the fixup and following the
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@ -191,33 +197,15 @@ public:
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}
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};
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class MipsEB_AsmBackend : public MipsAsmBackend {
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public:
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MipsEB_AsmBackend(const Target &T, uint8_t _OSABI)
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: MipsAsmBackend(T, _OSABI) {}
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ false, OSABI);
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}
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};
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class MipsEL_AsmBackend : public MipsAsmBackend {
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public:
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MipsEL_AsmBackend(const Target &T, uint8_t _OSABI)
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: MipsAsmBackend(T, _OSABI) {}
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ true, OSABI);
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}
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};
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} // namespace
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MCAsmBackend *llvm::createMipsBEAsmBackend(const Target &T, StringRef TT) {
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uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
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return new MipsEB_AsmBackend(T, OSABI);
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// MCAsmBackend
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MCAsmBackend *llvm::createMipsAsmBackendEL(const Target &T, StringRef TT) {
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return new MipsAsmBackend(T, Triple(TT).getOS(),
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/*IsLittle*/true);
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}
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MCAsmBackend *llvm::createMipsLEAsmBackend(const Target &T, StringRef TT) {
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uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
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return new MipsEL_AsmBackend(T, OSABI);
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MCAsmBackend *llvm::createMipsAsmBackendEB(const Target &T, StringRef TT) {
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return new MipsAsmBackend(T, Triple(TT).getOS(),
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/*IsLittle*/false);
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}
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@ -129,9 +129,8 @@ unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,
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return Type;
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}
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MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS,
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bool IsLittleEndian,
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uint8_t OSABI) {
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MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
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bool IsLittleEndian) {
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MCELFObjectTargetWriter *MOTW = new MipsELFObjectWriter(OSABI);
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return createELFObjectWriter(MOTW, OS, IsLittleEndian);
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}
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@ -34,10 +34,12 @@ class MipsMCCodeEmitter : public MCCodeEmitter {
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const MCInstrInfo &MCII;
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const MCSubtargetInfo &STI;
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MCContext &Ctx;
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bool IsLittleEndian;
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public:
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MipsMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti,
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MCContext &ctx) : MCII(mcii), STI(sti) , Ctx(ctx) {}
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MCContext &ctx, bool IsLittle) :
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MCII(mcii), STI(sti) , Ctx(ctx), IsLittleEndian(IsLittle) {}
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~MipsMCCodeEmitter() {}
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@ -88,11 +90,18 @@ public:
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}; // class MipsMCCodeEmitter
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} // namespace
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MCCodeEmitter *llvm::createMipsMCCodeEmitter(const MCInstrInfo &MCII,
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const MCSubtargetInfo &STI,
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MCContext &Ctx)
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MCCodeEmitter *llvm::createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
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const MCSubtargetInfo &STI,
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MCContext &Ctx)
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{
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return new MipsMCCodeEmitter(MCII, STI, Ctx);
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return new MipsMCCodeEmitter(MCII, STI, Ctx, false);
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}
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MCCodeEmitter *llvm::createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
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const MCSubtargetInfo &STI,
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MCContext &Ctx)
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{
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return new MipsMCCodeEmitter(MCII, STI, Ctx, true);
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}
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/// EncodeInstruction - Emit the instruction.
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@ -112,7 +112,8 @@ extern "C" void LLVMInitializeMipsTargetMC() {
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TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget, createMipsMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget,
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createMipsMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
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@ -122,33 +123,31 @@ extern "C" void LLVMInitializeMipsTargetMC() {
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createMipsMCRegisterInfo);
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// Register the MC Code Emitter
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TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget, createMipsMCCodeEmitter);
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TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget,
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createMipsMCCodeEmitterEB);
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TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
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createMipsMCCodeEmitter);
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createMipsMCCodeEmitterEL);
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TargetRegistry::RegisterMCCodeEmitter(TheMips64Target,
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createMipsMCCodeEmitter);
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createMipsMCCodeEmitterEB);
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TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget,
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createMipsMCCodeEmitter);
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createMipsMCCodeEmitterEL);
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// Register the object streamer.
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TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget, createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget,
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createMCStreamer);
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// Register the asm backend.
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TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
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createMipsBEAsmBackend);
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createMipsAsmBackendEB);
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TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
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createMipsLEAsmBackend);
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createMipsAsmBackendEL);
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TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
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createMipsBEAsmBackend);
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createMipsAsmBackendEB);
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TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
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createMipsLEAsmBackend);
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TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget, createMipsMCCodeEmitter);
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TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
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createMipsMCCodeEmitter);
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createMipsAsmBackendEL);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
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@ -32,16 +32,19 @@ extern Target TheMipselTarget;
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extern Target TheMips64Target;
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extern Target TheMips64elTarget;
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MCCodeEmitter *createMipsMCCodeEmitter(const MCInstrInfo &MCII,
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const MCSubtargetInfo &STI,
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MCContext &Ctx);
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MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
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const MCSubtargetInfo &STI,
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MCContext &Ctx);
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MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
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const MCSubtargetInfo &STI,
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MCContext &Ctx);
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MCAsmBackend *createMipsBEAsmBackend(const Target &T, StringRef TT);
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MCAsmBackend *createMipsLEAsmBackend(const Target &T, StringRef TT);
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MCAsmBackend *createMipsAsmBackendEB(const Target &T, StringRef TT);
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MCAsmBackend *createMipsAsmBackendEL(const Target &T, StringRef TT);
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MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
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bool IsLittleEndian,
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uint8_t OSABI);
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uint8_t OSABI,
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bool IsLittleEndian);
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} // End llvm namespace
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// Defines symbolic names for Mips registers. This defines a mapping from
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