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Pass endian information to constructors. Define separate functions to create

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objects for big endian and little endian targets.

Patch by Jack Carter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151788 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2012-03-01 01:53:15 +00:00
parent 66c994c2db
commit e9e520f23e
5 changed files with 55 additions and 57 deletions
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44
lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
View File

@ -70,10 +70,16 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
namespace {
class MipsAsmBackend : public MCAsmBackend {
Triple::OSType OSType;
bool IsLittle; // Big or little endian
public:
uint8_t OSABI;
MipsAsmBackend(const Target &T, uint8_t OSABI_) :
MCAsmBackend(), OSABI(OSABI_) {}
MipsAsmBackend(const Target &T, Triple::OSType _OSType, bool _isLittle) :
MCAsmBackend(), OSType(_OSType), IsLittle(_isLittle) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
return createMipsELFObjectWriter(OS, OSType, IsLittle);
}
/// ApplyFixup - Apply the \arg Value for given \arg Fixup into the provided
/// data fragment, at the offset specified by the fixup and following the
@ -191,33 +197,15 @@ public:
}
};
class MipsEB_AsmBackend : public MipsAsmBackend {
public:
MipsEB_AsmBackend(const Target &T, uint8_t _OSABI)
: MipsAsmBackend(T, _OSABI) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ false, OSABI);
}
};
class MipsEL_AsmBackend : public MipsAsmBackend {
public:
MipsEL_AsmBackend(const Target &T, uint8_t _OSABI)
: MipsAsmBackend(T, _OSABI) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ true, OSABI);
}
};
} // namespace
MCAsmBackend *llvm::createMipsBEAsmBackend(const Target &T, StringRef TT) {
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
return new MipsEB_AsmBackend(T, OSABI);
// MCAsmBackend
MCAsmBackend *llvm::createMipsAsmBackendEL(const Target &T, StringRef TT) {
return new MipsAsmBackend(T, Triple(TT).getOS(),
/*IsLittle*/true);
}
MCAsmBackend *llvm::createMipsLEAsmBackend(const Target &T, StringRef TT) {
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
return new MipsEL_AsmBackend(T, OSABI);
MCAsmBackend *llvm::createMipsAsmBackendEB(const Target &T, StringRef TT) {
return new MipsAsmBackend(T, Triple(TT).getOS(),
/*IsLittle*/false);
}

5
lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
View File

@ -129,9 +129,8 @@ unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,
return Type;
}
MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS,
bool IsLittleEndian,
uint8_t OSABI) {
MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
bool IsLittleEndian) {
MCELFObjectTargetWriter *MOTW = new MipsELFObjectWriter(OSABI);
return createELFObjectWriter(MOTW, OS, IsLittleEndian);
}

15
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
View File

@ -34,10 +34,12 @@ class MipsMCCodeEmitter : public MCCodeEmitter {
const MCInstrInfo &MCII;
const MCSubtargetInfo &STI;
MCContext &Ctx;
bool IsLittleEndian;
public:
MipsMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti,
MCContext &ctx) : MCII(mcii), STI(sti) , Ctx(ctx) {}
MCContext &ctx, bool IsLittle) :
MCII(mcii), STI(sti) , Ctx(ctx), IsLittleEndian(IsLittle) {}
~MipsMCCodeEmitter() {}
@ -88,11 +90,18 @@ public:
}; // class MipsMCCodeEmitter
} // namespace
MCCodeEmitter *llvm::createMipsMCCodeEmitter(const MCInstrInfo &MCII,
MCCodeEmitter *llvm::createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
const MCSubtargetInfo &STI,
MCContext &Ctx)
{
return new MipsMCCodeEmitter(MCII, STI, Ctx);
return new MipsMCCodeEmitter(MCII, STI, Ctx, false);
}
MCCodeEmitter *llvm::createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
const MCSubtargetInfo &STI,
MCContext &Ctx)
{
return new MipsMCCodeEmitter(MCII, STI, Ctx, true);
}
/// EncodeInstruction - Emit the instruction.

27
lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
View File

@ -112,7 +112,8 @@ extern "C" void LLVMInitializeMipsTargetMC() {
TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget, createMipsMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget,
createMipsMCInstrInfo);
// Register the MC register info.
TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
@ -122,33 +123,31 @@ extern "C" void LLVMInitializeMipsTargetMC() {
createMipsMCRegisterInfo);
// Register the MC Code Emitter
TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget, createMipsMCCodeEmitter);
TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget,
createMipsMCCodeEmitterEB);
TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
createMipsMCCodeEmitter);
createMipsMCCodeEmitterEL);
TargetRegistry::RegisterMCCodeEmitter(TheMips64Target,
createMipsMCCodeEmitter);
createMipsMCCodeEmitterEB);
TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget,
createMipsMCCodeEmitter);
createMipsMCCodeEmitterEL);
// Register the object streamer.
TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer);
TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer);
TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer);
TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget, createMCStreamer);
TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget,
createMCStreamer);
// Register the asm backend.
TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
createMipsBEAsmBackend);
createMipsAsmBackendEB);
TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
createMipsLEAsmBackend);
createMipsAsmBackendEL);
TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
createMipsBEAsmBackend);
createMipsAsmBackendEB);
TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
createMipsLEAsmBackend);
TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget, createMipsMCCodeEmitter);
TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
createMipsMCCodeEmitter);
createMipsAsmBackendEL);
// Register the MC subtarget info.
TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,

13
lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
View File

@ -32,16 +32,19 @@ extern Target TheMipselTarget;
extern Target TheMips64Target;
extern Target TheMips64elTarget;
MCCodeEmitter *createMipsMCCodeEmitter(const MCInstrInfo &MCII,
MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
const MCSubtargetInfo &STI,
MCContext &Ctx);
MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
const MCSubtargetInfo &STI,
MCContext &Ctx);
MCAsmBackend *createMipsBEAsmBackend(const Target &T, StringRef TT);
MCAsmBackend *createMipsLEAsmBackend(const Target &T, StringRef TT);
MCAsmBackend *createMipsAsmBackendEB(const Target &T, StringRef TT);
MCAsmBackend *createMipsAsmBackendEL(const Target &T, StringRef TT);
MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
bool IsLittleEndian,
uint8_t OSABI);
uint8_t OSABI,
bool IsLittleEndian);
} // End llvm namespace
// Defines symbolic names for Mips registers. This defines a mapping from