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LoopVectorize: getConsecutiveVector must respect signed arithmetic

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We were passing an i32 to ConstantInt::get where an i64 was needed and we must
also pass the sign if we pass negatives numbers. The start index passed to
getConsecutiveVector must also be signed.

Should fix PR15882.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181286 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Arnold Schwaighofer 2013-05-07 04:37:05 +00:00
parent d2e0f7ee15
commit eb95cec176
2 changed files with 85 additions and 5 deletions
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11
lib/Transforms/Vectorize/LoopVectorize.cpp
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@ -216,7 +216,7 @@ private:
/// This function adds 0, 1, 2 ... to each vector element, starting at zero. /// This function adds 0, 1, 2 ... to each vector element, starting at zero.
/// If Negate is set then negative numbers are added e.g. (0, -1, -2, ...). /// If Negate is set then negative numbers are added e.g. (0, -1, -2, ...).
/// The sequence starts at StartIndex. /// The sequence starts at StartIndex.
Value *getConsecutiveVector(Value* Val, unsigned StartIdx, bool Negate); Value *getConsecutiveVector(Value* Val, int StartIdx, bool Negate);
/// When we go over instructions in the basic block we rely on previous /// When we go over instructions in the basic block we rely on previous
/// values within the current basic block or on loop invariant values. /// values within the current basic block or on loop invariant values.
@ -829,7 +829,7 @@ Value *InnerLoopVectorizer::getBroadcastInstrs(Value *V) {
return Shuf; return Shuf;
} }
Value *InnerLoopVectorizer::getConsecutiveVector(Value* Val, unsigned StartIdx, Value *InnerLoopVectorizer::getConsecutiveVector(Value* Val, int StartIdx,
bool Negate) { bool Negate) {
assert(Val->getType()->isVectorTy() && "Must be a vector"); assert(Val->getType()->isVectorTy() && "Must be a vector");
assert(Val->getType()->getScalarType()->isIntegerTy() && assert(Val->getType()->getScalarType()->isIntegerTy() &&
@ -842,8 +842,8 @@ Value *InnerLoopVectorizer::getConsecutiveVector(Value* Val, unsigned StartIdx,
// Create a vector of consecutive numbers from zero to VF. // Create a vector of consecutive numbers from zero to VF.
for (int i = 0; i < VLen; ++i) { for (int i = 0; i < VLen; ++i) {
int Idx = Negate ? (-i): i; int64_t Idx = Negate ? (-i) : i;
Indices.push_back(ConstantInt::get(ITy, StartIdx + Idx)); Indices.push_back(ConstantInt::get(ITy, StartIdx + Idx, Negate));
} }
// Add the consecutive indices to the vector value. // Add the consecutive indices to the vector value.
@ -2072,7 +2072,8 @@ InnerLoopVectorizer::vectorizeBlockInLoop(LoopVectorizationLegality *Legal,
// After broadcasting the induction variable we need to make the // After broadcasting the induction variable we need to make the
// vector consecutive by adding ... -3, -2, -1, 0. // vector consecutive by adding ... -3, -2, -1, 0.
for (unsigned part = 0; part < UF; ++part) for (unsigned part = 0; part < UF; ++part)
Entry[part] = getConsecutiveVector(Broadcasted, -VF * part, true); Entry[part] = getConsecutiveVector(Broadcasted, -(int)VF * part,
true);
continue; continue;
} }

79
test/Transforms/LoopVectorize/reverse_induction.ll Normal file
View File

@ -0,0 +1,79 @@
; RUN: opt < %s -loop-vectorize -force-vector-unroll=2 -force-vector-width=4 -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
; Make sure consecutive vector generates correct negative indices.
; PR15882
; CHECK: reverse_induction_i64
; CHECK: add <4 x i64> %[[SPLAT:.*]], <i64 0, i64 -1, i64 -2, i64 -3>
; CHECK: add <4 x i64> %[[SPLAT]], <i64 -4, i64 -5, i64 -6, i64 -7>
define i32 @reverse_induction_i64(i64 %startval, i32 * %ptr) {
entry:
br label %for.body
for.body:
%add.i7 = phi i64 [ %startval, %entry ], [ %add.i, %for.body ]
%i.06 = phi i32 [ 0, %entry ], [ %inc4, %for.body ]
%redux5 = phi i32 [ 0, %entry ], [ %inc.redux, %for.body ]
%add.i = add i64 %add.i7, -1
%kind_.i = getelementptr inbounds i32* %ptr, i64 %add.i
%tmp.i1 = load i32* %kind_.i, align 4
%inc.redux = add i32 %tmp.i1, %redux5
%inc4 = add i32 %i.06, 1
%exitcond = icmp ne i32 %inc4, 1024
br i1 %exitcond, label %for.body, label %loopend
loopend:
ret i32 %inc.redux
}
; CHECK: reverse_induction_i128
; CHECK: add <4 x i128> %[[SPLAT:.*]], <i128 0, i128 -1, i128 -2, i128 -3>
; CHECK: add <4 x i128> %[[SPLAT]], <i128 -4, i128 -5, i128 -6, i128 -7>
define i32 @reverse_induction_i128(i128 %startval, i32 * %ptr) {
entry:
br label %for.body
for.body:
%add.i7 = phi i128 [ %startval, %entry ], [ %add.i, %for.body ]
%i.06 = phi i32 [ 0, %entry ], [ %inc4, %for.body ]
%redux5 = phi i32 [ 0, %entry ], [ %inc.redux, %for.body ]
%add.i = add i128 %add.i7, -1
%kind_.i = getelementptr inbounds i32* %ptr, i128 %add.i
%tmp.i1 = load i32* %kind_.i, align 4
%inc.redux = add i32 %tmp.i1, %redux5
%inc4 = add i32 %i.06, 1
%exitcond = icmp ne i32 %inc4, 1024
br i1 %exitcond, label %for.body, label %loopend
loopend:
ret i32 %inc.redux
}
; CHECK: reverse_induction_i16
; CHECK: add <4 x i16> %[[SPLAT:.*]], <i16 0, i16 -1, i16 -2, i16 -3>
; CHECK: add <4 x i16> %[[SPLAT]], <i16 -4, i16 -5, i16 -6, i16 -7>
define i32 @reverse_induction_i16(i16 %startval, i32 * %ptr) {
entry:
br label %for.body
for.body:
%add.i7 = phi i16 [ %startval, %entry ], [ %add.i, %for.body ]
%i.06 = phi i32 [ 0, %entry ], [ %inc4, %for.body ]
%redux5 = phi i32 [ 0, %entry ], [ %inc.redux, %for.body ]
%add.i = add i16 %add.i7, -1
%kind_.i = getelementptr inbounds i32* %ptr, i16 %add.i
%tmp.i1 = load i32* %kind_.i, align 4
%inc.redux = add i32 %tmp.i1, %redux5
%inc4 = add i32 %i.06, 1
%exitcond = icmp ne i32 %inc4, 1024
br i1 %exitcond, label %for.body, label %loopend
loopend:
ret i32 %inc.redux
}