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AMDGPU: Set SubRegIndex size and offset

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I'm not sure what reasons the comment here could have
had for not setting these. Without these set, there is
an assertion hit during DWARF emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243661 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2015-07-30 17:03:11 +00:00
parent b240003d58
commit ece90bb19e
1 changed files with 1 additions and 2 deletions
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3
lib/Target/AMDGPU/AMDGPURegisterInfo.td
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@ -14,8 +14,7 @@
let Namespace = "AMDGPU" in {
foreach Index = 0-15 in {
// Indices are used in a variety of ways here, so don't set a size/offset.
def sub#Index : SubRegIndex<-1, -1>;
def sub#Index : SubRegIndex<32, !shl(Index, 5)>;
}
def INDIRECT_BASE_ADDR : Register <"INDIRECT_BASE_ADDR">;