RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-11-29 22:50:55 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Really control isel of barrier instructions with cpu feature.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110787 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2010-08-11 06:36:31 +00:00
parent c7569ed4e4
commit ee34987fd5
2 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/ARM/ARMInstrInfo.td
View File

@ -2371,7 +2371,7 @@ def MOVCCi : AI1<0b1101, (outs GPR:$dst),
// memory barriers protect the atomic sequences
let hasSideEffects = 1 in {
def DMBsy : AInoP<(outs), (ins), Pseudo, NoItinerary, "dmb", "",
[(ARMMemBarrier)]>, Requires<[IsARM, HasV7]> {
[(ARMMemBarrier)]>, Requires<[IsARM, HasDB]> {
let Inst{31-4} = 0xf57ff05;
// FIXME: add support for options other than a full system DMB
// See DMB disassembly-only variants below.
@ -2379,7 +2379,7 @@ def DMBsy : AInoP<(outs), (ins), Pseudo, NoItinerary, "dmb", "",
}
def DSBsy : AInoP<(outs), (ins), Pseudo, NoItinerary, "dsb", "",
[(ARMSyncBarrier)]>, Requires<[IsARM, HasV7]> {
[(ARMSyncBarrier)]>, Requires<[IsARM, HasDB]> {
let Inst{31-4} = 0xf57ff04;
// FIXME: add support for options other than a full system DSB
// See DSB disassembly-only variants below.

4
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -2230,14 +2230,14 @@ def t2MOVCCror : T2I_movcc_sh<0b11, (outs rGPR:$dst),
// memory barriers protect the atomic sequences
let hasSideEffects = 1 in {
def t2DMBsy : AInoP<(outs), (ins), ThumbFrm, NoItinerary, "dmb", "",
[(ARMMemBarrier)]>, Requires<[HasDB]> {
[(ARMMemBarrier)]>, Requires<[IsThumb, HasDB]> {
let Inst{31-4} = 0xF3BF8F5;
// FIXME: add support for options other than a full system DMB
let Inst{3-0} = 0b1111;
}
def t2DSBsy : AInoP<(outs), (ins), ThumbFrm, NoItinerary, "dsb", "",
[(ARMSyncBarrier)]>, Requires<[HasDB]> {
[(ARMSyncBarrier)]>, Requires<[IsThumb, HasDB]> {
let Inst{31-4} = 0xF3BF8F4;
// FIXME: add support for options other than a full system DSB
let Inst{3-0} = 0b1111;