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[X86] Fix shuffle decoding for variable VPERMIL to be tolerant of the Constant type not matching due to folding in the constant pool and to get VPERMILPD correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256433 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -388,44 +388,66 @@ void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
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}
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}
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void DecodeVPERMILPMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask) {
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void DecodeVPERMILPMask(const Constant *C, unsigned ElSize,
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SmallVectorImpl<int> &ShuffleMask) {
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Type *MaskTy = C->getType();
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assert(MaskTy->isVectorTy() && "Expected a vector constant mask!");
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assert(MaskTy->getVectorElementType()->isIntegerTy() &&
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"Expected integer constant mask elements!");
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int ElementBits = MaskTy->getScalarSizeInBits();
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int NumElements = MaskTy->getVectorNumElements();
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// It is not an error for the PSHUFB mask to not be a vector of i8 because the
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// constant pool uniques constants by their bit representation.
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// e.g. the following take up the same space in the constant pool:
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// i128 -170141183420855150465331762880109871104
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//
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// <2 x i64> <i64 -9223372034707292160, i64 -9223372034707292160>
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//
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// <4 x i32> <i32 -2147483648, i32 -2147483648,
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// i32 -2147483648, i32 -2147483648>
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unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
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if (MaskTySize != 128 && MaskTySize != 256) // FIXME: Add support for AVX-512.
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return;
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// Only support vector types.
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if (!MaskTy->isVectorTy())
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return;
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// Make sure its an integer type.
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Type *VecEltTy = MaskTy->getVectorElementType();
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if (!VecEltTy->isIntegerTy())
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return;
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// Support any element type from byte up to element size.
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// This is necesary primarily because 64-bit elements get split to 32-bit
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// in the constant pool on 32-bit target.
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unsigned EltTySize = VecEltTy->getIntegerBitWidth();
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if (EltTySize < 8 || EltTySize > ElSize)
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return;
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unsigned NumElements = MaskTySize / ElSize;
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assert((NumElements == 2 || NumElements == 4 || NumElements == 8) &&
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"Unexpected number of vector elements.");
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ShuffleMask.reserve(NumElements);
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if (auto *CDS = dyn_cast<ConstantDataSequential>(C)) {
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assert((unsigned)NumElements == CDS->getNumElements() &&
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"Constant mask has a different number of elements!");
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unsigned NumElementsPerLane = 128 / ElSize;
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unsigned Factor = ElSize / EltTySize;
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for (int i = 0; i < NumElements; ++i) {
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int Base = (i * ElementBits / 128) * (128 / ElementBits);
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uint64_t Element = CDS->getElementAsInteger(i);
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// Only the least significant 2 bits of the integer are used.
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int Index = Base + (Element & 0x3);
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ShuffleMask.push_back(Index);
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}
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} else if (auto *CV = dyn_cast<ConstantVector>(C)) {
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assert((unsigned)NumElements == C->getNumOperands() &&
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"Constant mask has a different number of elements!");
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for (int i = 0; i < NumElements; ++i) {
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int Base = (i * ElementBits / 128) * (128 / ElementBits);
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Constant *COp = CV->getOperand(i);
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if (isa<UndefValue>(COp)) {
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ShuffleMask.push_back(SM_SentinelUndef);
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continue;
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}
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uint64_t Element = cast<ConstantInt>(COp)->getZExtValue();
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// Only the least significant 2 bits of the integer are used.
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int Index = Base + (Element & 0x3);
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ShuffleMask.push_back(Index);
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for (unsigned i = 0; i < NumElements; ++i) {
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Constant *COp = C->getAggregateElement(i * Factor);
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if (!COp) {
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ShuffleMask.clear();
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return;
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} else if (isa<UndefValue>(COp)) {
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ShuffleMask.push_back(SM_SentinelUndef);
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continue;
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}
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int Index = i & ~(NumElementsPerLane - 1);
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uint64_t Element = cast<ConstantInt>(COp)->getZExtValue();
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if (ElSize == 64)
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Index += (Element >> 1) & 0x1;
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else
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Index += Element & 0x3;
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ShuffleMask.push_back(Index);
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}
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// TODO: Handle funny-looking vectors too.
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}
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void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT, SmallVectorImpl<int> &Mask) {
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@ -96,7 +96,8 @@ void decodeVSHUF64x2FamilyMask(MVT VT, unsigned Imm,
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void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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/// \brief Decode a VPERMILP variable mask from an IR-level vector constant.
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void DecodeVPERMILPMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask);
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void DecodeVPERMILPMask(const Constant *C, unsigned ElSize,
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SmallVectorImpl<int> &ShuffleMask);
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/// \brief Decode a zero extension instruction as a shuffle mask.
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void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT,
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@ -1303,9 +1303,16 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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const MachineOperand &SrcOp = MI->getOperand(1);
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const MachineOperand &MaskOp = MI->getOperand(5);
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unsigned ElSize;
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switch (MI->getOpcode()) {
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default: llvm_unreachable("Invalid opcode");
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case X86::VPERMILPSrm: case X86::VPERMILPSYrm: ElSize = 32; break;
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case X86::VPERMILPDrm: case X86::VPERMILPDYrm: ElSize = 64; break;
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}
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if (auto *C = getConstantFromPool(*MI, MaskOp)) {
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SmallVector<int, 16> Mask;
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DecodeVPERMILPMask(C, Mask);
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DecodeVPERMILPMask(C, ElSize, Mask);
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if (!Mask.empty())
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OutStreamer->AddComment(getShuffleComment(DstOp, SrcOp, Mask));
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}
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