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[InstCombine] add tests for missing vector icmp folds

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279259 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel 2016-08-19 15:27:28 +00:00
parent 762d2ecc14
commit f17d15a58d
1 changed files with 17 additions and 0 deletions
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17
test/Transforms/InstCombine/icmp.ll
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@ -2590,6 +2590,11 @@ define i1 @ugtMaxSignedVal(i8 %a) {
ret i1 %cmp
}
define <2 x i1> @ugtMaxSignedValVec(<2 x i8> %a) {
%cmp = icmp ugt <2 x i8> %a, <i8 127, i8 127>
ret <2 x i1> %cmp
}
define i1 @ugtKnownBits(i8 %a) {
; CHECK-LABEL: @ugtKnownBits(
; CHECK-NEXT: [[B:%.*]] = and i8 %a, 17
@ -2600,3 +2605,15 @@ define i1 @ugtKnownBits(i8 %a) {
%cmp = icmp ugt i8 %b, 16
ret i1 %cmp
}
define <2 x i1> @ugtKnownBitsVec(<2 x i8> %a) {
; CHECK-LABEL: @ugtKnownBitsVec(
; CHECK-NEXT: [[B:%.*]] = and <2 x i8> %a, <i8 17, i8 17>
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> [[B]], <i8 16, i8 16>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%b = and <2 x i8> %a, <i8 17, i8 17>
%cmp = icmp ugt <2 x i8> %b, <i8 16, i8 16>
ret <2 x i1> %cmp
}