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remove duplicated comments and don't repeat function names in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255257 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel
parent
c818b3ef56
commit
f3ba0560c0
@ -153,7 +153,7 @@ namespace {
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}
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private:
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/// CandidateInfo - Keep track of information about hoisting candidates.
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/// Keep track of information about hoisting candidates.
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struct CandidateInfo {
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MachineInstr *MI;
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unsigned Def;
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@ -162,149 +162,76 @@ namespace {
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: MI(mi), Def(def), FI(fi) {}
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};
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/// HoistRegionPostRA - Walk the specified region of the CFG and hoist loop
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/// invariants out to the preheader.
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void HoistRegionPostRA();
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/// HoistPostRA - When an instruction is found to only use loop invariant
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/// operands that is safe to hoist, this instruction is called to do the
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/// dirty work.
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void HoistPostRA(MachineInstr *MI, unsigned Def);
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/// ProcessMI - Examine the instruction for potentai LICM candidate. Also
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/// gather register def and frame object update information.
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void ProcessMI(MachineInstr *MI,
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BitVector &PhysRegDefs,
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BitVector &PhysRegClobbers,
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SmallSet<int, 32> &StoredFIs,
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void ProcessMI(MachineInstr *MI, BitVector &PhysRegDefs,
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BitVector &PhysRegClobbers, SmallSet<int, 32> &StoredFIs,
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SmallVectorImpl<CandidateInfo> &Candidates);
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/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the
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/// current loop.
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void AddToLiveIns(unsigned Reg);
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/// IsLICMCandidate - Returns true if the instruction may be a suitable
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/// candidate for LICM. e.g. If the instruction is a call, then it's
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/// obviously not safe to hoist it.
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bool IsLICMCandidate(MachineInstr &I);
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/// IsLoopInvariantInst - Returns true if the instruction is loop
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/// invariant. I.e., all virtual register operands are defined outside of
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/// the loop, physical registers aren't accessed (explicitly or implicitly),
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/// and the instruction is hoistable.
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///
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bool IsLoopInvariantInst(MachineInstr &I);
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/// HasLoopPHIUse - Return true if the specified instruction is used by any
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/// phi node in the current loop.
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bool HasLoopPHIUse(const MachineInstr *MI) const;
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/// HasHighOperandLatency - Compute operand latency between a def of 'Reg'
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/// and an use in the current loop, return true if the target considered
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/// it 'high'.
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bool HasHighOperandLatency(MachineInstr &MI, unsigned DefIdx,
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unsigned Reg) const;
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bool IsCheapInstruction(MachineInstr &MI) const;
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/// CanCauseHighRegPressure - Visit BBs from header to current BB,
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/// check if hoisting an instruction of the given cost matrix can cause high
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/// register pressure.
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bool CanCauseHighRegPressure(const DenseMap<unsigned, int> &Cost,
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bool Cheap);
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/// UpdateBackTraceRegPressure - Traverse the back trace from header to
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/// the current block and update their register pressures to reflect the
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/// effect of hoisting MI from the current block to the preheader.
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void UpdateBackTraceRegPressure(const MachineInstr *MI);
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/// IsProfitableToHoist - Return true if it is potentially profitable to
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/// hoist the given loop invariant.
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bool IsProfitableToHoist(MachineInstr &MI);
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/// IsGuaranteedToExecute - Check if this mbb is guaranteed to execute.
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/// If not then a load from this mbb may not be safe to hoist.
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bool IsGuaranteedToExecute(MachineBasicBlock *BB);
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void EnterScope(MachineBasicBlock *MBB);
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void ExitScope(MachineBasicBlock *MBB);
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/// ExitScopeIfDone - Destroy scope for the MBB that corresponds to given
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/// dominator tree node if its a leaf or all of its children are done. Walk
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/// up the dominator tree to destroy ancestors which are now done.
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void ExitScopeIfDone(MachineDomTreeNode *Node,
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DenseMap<MachineDomTreeNode*, unsigned> &OpenChildren,
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DenseMap<MachineDomTreeNode*, MachineDomTreeNode*> &ParentMap);
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void ExitScopeIfDone(
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MachineDomTreeNode *Node,
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DenseMap<MachineDomTreeNode *, unsigned> &OpenChildren,
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DenseMap<MachineDomTreeNode *, MachineDomTreeNode *> &ParentMap);
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/// HoistOutOfLoop - Walk the specified loop in the CFG (defined by all
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/// blocks dominated by the specified header block, and that are in the
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/// current loop) in depth first order w.r.t the DominatorTree. This allows
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/// us to visit definitions before uses, allowing us to hoist a loop body in
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/// one pass without iteration.
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///
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void HoistOutOfLoop(MachineDomTreeNode *LoopHeaderNode);
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void HoistRegion(MachineDomTreeNode *N, bool IsHeader);
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/// SinkIntoLoop - Sink instructions into loops if profitable. This
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/// especially tries to prevent register spills caused by register pressure
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/// if there is little to no overhead moving instructions into loops.
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void SinkIntoLoop();
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/// InitRegPressure - Find all virtual register references that are liveout
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/// of the preheader to initialize the starting "register pressure". Note
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/// this does not count live through (livein but not used) registers.
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void InitRegPressure(MachineBasicBlock *BB);
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/// calcRegisterCost - Calculate the additional register pressure that the
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/// registers used in MI cause.
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///
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/// If 'ConsiderSeen' is true, updates 'RegSeen' and uses the information to
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/// figure out which usages are live-ins.
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/// FIXME: Figure out a way to consider 'RegSeen' from all code paths.
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DenseMap<unsigned, int> calcRegisterCost(const MachineInstr *MI,
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bool ConsiderSeen,
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bool ConsiderUnseenAsDef);
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/// UpdateRegPressure - Update estimate of register pressure after the
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/// specified instruction.
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void UpdateRegPressure(const MachineInstr *MI,
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bool ConsiderUnseenAsDef = false);
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/// ExtractHoistableLoad - Unfold a load from the given machineinstr if
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/// the load itself could be hoisted. Return the unfolded and hoistable
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/// load, or null if the load couldn't be unfolded or if it wouldn't
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/// be hoistable.
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MachineInstr *ExtractHoistableLoad(MachineInstr *MI);
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/// LookForDuplicate - Find an instruction amount PrevMIs that is a
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/// duplicate of MI. Return this instruction if it's found.
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const MachineInstr *LookForDuplicate(const MachineInstr *MI,
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std::vector<const MachineInstr*> &PrevMIs);
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const MachineInstr *
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LookForDuplicate(const MachineInstr *MI,
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std::vector<const MachineInstr *> &PrevMIs);
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/// EliminateCSE - Given a LICM'ed instruction, look for an instruction on
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/// the preheader that compute the same value. If it's found, do a RAU on
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/// with the definition of the existing instruction rather than hoisting
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/// the instruction to the preheader.
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bool EliminateCSE(MachineInstr *MI,
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DenseMap<unsigned, std::vector<const MachineInstr*> >::iterator &CI);
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bool EliminateCSE(
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MachineInstr *MI,
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DenseMap<unsigned, std::vector<const MachineInstr *>>::iterator &CI);
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/// MayCSE - Return true if the given instruction will be CSE'd if it's
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/// hoisted out of the loop.
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bool MayCSE(MachineInstr *MI);
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/// Hoist - When an instruction is found to only use loop invariant operands
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/// that is safe to hoist, this instruction is called to do the dirty work.
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/// It returns true if the instruction is hoisted.
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bool Hoist(MachineInstr *MI, MachineBasicBlock *Preheader);
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/// InitCSEMap - Initialize the CSE map with instructions that are in the
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/// current loop preheader that may become duplicates of instructions that
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/// are hoisted out of the loop.
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void InitCSEMap(MachineBasicBlock *BB);
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/// getCurPreheader - Get the preheader for the current loop, splitting
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/// a critical edge if needed.
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MachineBasicBlock *getCurPreheader();
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};
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} // end anonymous namespace
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@ -319,8 +246,7 @@ INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
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INITIALIZE_PASS_END(MachineLICM, "machinelicm",
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"Machine Loop Invariant Code Motion", false, false)
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/// LoopIsOuterMostWithPredecessor - Test if the given loop is the outer-most
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/// loop that has a unique predecessor.
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/// Test if the given loop is the outer-most loop that has a unique predecessor.
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static bool LoopIsOuterMostWithPredecessor(MachineLoop *CurLoop) {
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// Check whether this loop even has a unique predecessor.
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if (!CurLoop->getLoopPredecessor())
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@ -402,8 +328,7 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
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return Changed;
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}
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/// InstructionStoresToFI - Return true if instruction stores to the
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/// specified frame.
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/// Return true if instruction stores to the specified frame.
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static bool InstructionStoresToFI(const MachineInstr *MI, int FI) {
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for (MachineInstr::mmo_iterator o = MI->memoperands_begin(),
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oe = MI->memoperands_end(); o != oe; ++o) {
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@ -418,7 +343,7 @@ static bool InstructionStoresToFI(const MachineInstr *MI, int FI) {
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return false;
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}
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/// ProcessMI - Examine the instruction for potentai LICM candidate. Also
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/// Examine the instruction for potentai LICM candidate. Also
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/// gather register def and frame object update information.
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void MachineLICM::ProcessMI(MachineInstr *MI,
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BitVector &PhysRegDefs,
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@ -506,8 +431,8 @@ void MachineLICM::ProcessMI(MachineInstr *MI,
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}
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}
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/// HoistRegionPostRA - Walk the specified region of the CFG and hoist loop
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/// invariants out to the preheader.
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/// Walk the specified region of the CFG and hoist loop invariants out to the
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/// preheader.
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void MachineLICM::HoistRegionPostRA() {
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MachineBasicBlock *Preheader = getCurPreheader();
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if (!Preheader)
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@ -599,8 +524,8 @@ void MachineLICM::HoistRegionPostRA() {
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}
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}
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/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the current
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/// loop, and make sure it is not killed by any instructions in the loop.
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/// Add register 'Reg' to the livein sets of BBs in the current loop, and make
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/// sure it is not killed by any instructions in the loop.
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void MachineLICM::AddToLiveIns(unsigned Reg) {
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const std::vector<MachineBasicBlock *> &Blocks = CurLoop->getBlocks();
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for (unsigned i = 0, e = Blocks.size(); i != e; ++i) {
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@ -620,9 +545,8 @@ void MachineLICM::AddToLiveIns(unsigned Reg) {
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}
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}
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/// HoistPostRA - When an instruction is found to only use loop invariant
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/// operands that is safe to hoist, this instruction is called to do the
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/// dirty work.
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/// When an instruction is found to only use loop invariant operands that is
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/// safe to hoist, this instruction is called to do the dirty work.
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void MachineLICM::HoistPostRA(MachineInstr *MI, unsigned Def) {
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MachineBasicBlock *Preheader = getCurPreheader();
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@ -644,8 +568,8 @@ void MachineLICM::HoistPostRA(MachineInstr *MI, unsigned Def) {
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Changed = true;
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}
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// IsGuaranteedToExecute - Check if this mbb is guaranteed to execute.
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// If not then a load from this mbb may not be safe to hoist.
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/// Check if this mbb is guaranteed to execute. If not then a load from this mbb
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/// may not be safe to hoist.
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bool MachineLICM::IsGuaranteedToExecute(MachineBasicBlock *BB) {
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if (SpeculationState != SpeculateUnknown)
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return SpeculationState == SpeculateFalse;
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@ -677,9 +601,9 @@ void MachineLICM::ExitScope(MachineBasicBlock *MBB) {
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BackTrace.pop_back();
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}
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/// ExitScopeIfDone - Destroy scope for the MBB that corresponds to the given
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/// dominator tree node if its a leaf or all of its children are done. Walk
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/// up the dominator tree to destroy ancestors which are now done.
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/// Destroy scope for the MBB that corresponds to the given dominator tree node
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/// if its a leaf or all of its children are done. Walk up the dominator tree to
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/// destroy ancestors which are now done.
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void MachineLICM::ExitScopeIfDone(MachineDomTreeNode *Node,
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DenseMap<MachineDomTreeNode*, unsigned> &OpenChildren,
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DenseMap<MachineDomTreeNode*, MachineDomTreeNode*> &ParentMap) {
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@ -699,11 +623,10 @@ void MachineLICM::ExitScopeIfDone(MachineDomTreeNode *Node,
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}
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}
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/// HoistOutOfLoop - Walk the specified loop in the CFG (defined by all
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/// blocks dominated by the specified header block, and that are in the
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/// current loop) in depth first order w.r.t the DominatorTree. This allows
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/// us to visit definitions before uses, allowing us to hoist a loop body in
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/// one pass without iteration.
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/// Walk the specified loop in the CFG (defined by all blocks dominated by the
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/// specified header block, and that are in the current loop) in depth first
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/// order w.r.t the DominatorTree. This allows us to visit definitions before
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/// uses, allowing us to hoist a loop body in one pass without iteration.
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///
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void MachineLICM::HoistOutOfLoop(MachineDomTreeNode *HeaderN) {
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MachineBasicBlock *Preheader = getCurPreheader();
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@ -784,6 +707,9 @@ void MachineLICM::HoistOutOfLoop(MachineDomTreeNode *HeaderN) {
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}
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}
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/// Sink instructions into loops if profitable. This especially tries to prevent
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/// register spills caused by register pressure if there is little to no
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/// overhead moving instructions into loops.
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void MachineLICM::SinkIntoLoop() {
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MachineBasicBlock *Preheader = getCurPreheader();
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if (!Preheader)
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@ -835,9 +761,9 @@ static bool isOperandKill(const MachineOperand &MO, MachineRegisterInfo *MRI) {
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return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());
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}
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/// InitRegPressure - Find all virtual register references that are liveout of
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/// the preheader to initialize the starting "register pressure". Note this
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/// does not count live through (livein but not used) registers.
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/// Find all virtual register references that are liveout of the preheader to
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/// initialize the starting "register pressure". Note this does not count live
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/// through (livein but not used) registers.
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void MachineLICM::InitRegPressure(MachineBasicBlock *BB) {
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std::fill(RegPressure.begin(), RegPressure.end(), 0);
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@ -856,8 +782,7 @@ void MachineLICM::InitRegPressure(MachineBasicBlock *BB) {
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UpdateRegPressure(&MI, /*ConsiderUnseenAsDef=*/true);
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}
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/// UpdateRegPressure - Update estimate of register pressure after the
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/// specified instruction.
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/// Update estimate of register pressure after the specified instruction.
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void MachineLICM::UpdateRegPressure(const MachineInstr *MI,
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bool ConsiderUnseenAsDef) {
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auto Cost = calcRegisterCost(MI, /*ConsiderSeen=*/true, ConsiderUnseenAsDef);
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@ -870,6 +795,12 @@ void MachineLICM::UpdateRegPressure(const MachineInstr *MI,
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}
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}
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/// Calculate the additional register pressure that the registers used in MI
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/// cause.
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///
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/// If 'ConsiderSeen' is true, updates 'RegSeen' and uses the information to
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/// figure out which usages are live-ins.
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/// FIXME: Figure out a way to consider 'RegSeen' from all code paths.
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DenseMap<unsigned, int>
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MachineLICM::calcRegisterCost(const MachineInstr *MI, bool ConsiderSeen,
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bool ConsiderUnseenAsDef) {
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@ -913,8 +844,8 @@ MachineLICM::calcRegisterCost(const MachineInstr *MI, bool ConsiderSeen,
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return Cost;
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}
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/// isLoadFromGOTOrConstantPool - Return true if this machine instruction
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/// loads from global offset table or constant pool.
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/// Return true if this machine instruction loads from global offset table or
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/// constant pool.
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static bool isLoadFromGOTOrConstantPool(MachineInstr &MI) {
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assert (MI.mayLoad() && "Expected MI that loads!");
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for (MachineInstr::mmo_iterator I = MI.memoperands_begin(),
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@ -927,9 +858,8 @@ static bool isLoadFromGOTOrConstantPool(MachineInstr &MI) {
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return false;
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}
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/// IsLICMCandidate - Returns true if the instruction may be a suitable
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/// candidate for LICM. e.g. If the instruction is a call, then it's obviously
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/// not safe to hoist it.
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/// Returns true if the instruction may be a suitable candidate for LICM.
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/// e.g. If the instruction is a call, then it's obviously not safe to hoist it.
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bool MachineLICM::IsLICMCandidate(MachineInstr &I) {
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// Check if it's safe to move the instruction.
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bool DontMoveAcrossStore = true;
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@ -949,9 +879,9 @@ bool MachineLICM::IsLICMCandidate(MachineInstr &I) {
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return true;
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}
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/// IsLoopInvariantInst - Returns true if the instruction is loop
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/// invariant. I.e., all virtual register operands are defined outside of the
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/// loop, physical registers aren't accessed explicitly, and there are no side
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/// Returns true if the instruction is loop invariant.
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/// I.e., all virtual register operands are defined outside of the loop,
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/// physical registers aren't accessed explicitly, and there are no side
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/// effects that aren't captured by the operands or other flags.
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///
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bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
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@ -1005,8 +935,8 @@ bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
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}
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/// HasLoopPHIUse - Return true if the specified instruction is used by a
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/// phi node and hoisting it could cause a copy to be inserted.
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/// Return true if the specified instruction is used by a phi node and hoisting
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/// it could cause a copy to be inserted.
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bool MachineLICM::HasLoopPHIUse(const MachineInstr *MI) const {
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SmallVector<const MachineInstr*, 8> Work(1, MI);
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do {
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@ -1040,9 +970,8 @@ bool MachineLICM::HasLoopPHIUse(const MachineInstr *MI) const {
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return false;
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}
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/// HasHighOperandLatency - Compute operand latency between a def of 'Reg'
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/// and an use in the current loop, return true if the target considered
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/// it 'high'.
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/// Compute operand latency between a def of 'Reg' and an use in the current
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/// loop, return true if the target considered it high.
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bool MachineLICM::HasHighOperandLatency(MachineInstr &MI,
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unsigned DefIdx, unsigned Reg) const {
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if (MRI->use_nodbg_empty(Reg))
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@ -1072,8 +1001,8 @@ bool MachineLICM::HasHighOperandLatency(MachineInstr &MI,
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return false;
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}
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/// IsCheapInstruction - Return true if the instruction is marked "cheap" or
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/// the operand latency between its def and a use is one or less.
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/// Return true if the instruction is marked "cheap" or the operand latency
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/// between its def and a use is one or less.
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bool MachineLICM::IsCheapInstruction(MachineInstr &MI) const {
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if (TII->isAsCheapAsAMove(&MI) || MI.isCopyLike())
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return true;
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@ -1097,9 +1026,8 @@ bool MachineLICM::IsCheapInstruction(MachineInstr &MI) const {
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return isCheap;
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}
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/// CanCauseHighRegPressure - Visit BBs from header to current BB, check
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/// if hoisting an instruction of the given cost matrix can cause high
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/// register pressure.
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/// Visit BBs from header to current BB, check if hoisting an instruction of the
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/// given cost matrix can cause high register pressure.
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bool MachineLICM::CanCauseHighRegPressure(const DenseMap<unsigned, int>& Cost,
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bool CheapInstr) {
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for (const auto &RPIdAndCost : Cost) {
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@ -1122,9 +1050,9 @@ bool MachineLICM::CanCauseHighRegPressure(const DenseMap<unsigned, int>& Cost,
|
||||
return false;
|
||||
}
|
||||
|
||||
/// UpdateBackTraceRegPressure - Traverse the back trace from header to the
|
||||
/// current block and update their register pressures to reflect the effect
|
||||
/// of hoisting MI from the current block to the preheader.
|
||||
/// Traverse the back trace from header to the current block and update their
|
||||
/// register pressures to reflect the effect of hoisting MI from the current
|
||||
/// block to the preheader.
|
||||
void MachineLICM::UpdateBackTraceRegPressure(const MachineInstr *MI) {
|
||||
// First compute the 'cost' of the instruction, i.e. its contribution
|
||||
// to register pressure.
|
||||
@ -1137,8 +1065,8 @@ void MachineLICM::UpdateBackTraceRegPressure(const MachineInstr *MI) {
|
||||
RP[RPIdAndCost.first] += RPIdAndCost.second;
|
||||
}
|
||||
|
||||
/// IsProfitableToHoist - Return true if it is potentially profitable to hoist
|
||||
/// the given loop invariant.
|
||||
/// Return true if it is potentially profitable to hoist the given loop
|
||||
/// invariant.
|
||||
bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) {
|
||||
if (MI.isImplicitDef())
|
||||
return true;
|
||||
@ -1228,6 +1156,9 @@ bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) {
|
||||
return true;
|
||||
}
|
||||
|
||||
/// Unfold a load from the given machineinstr if the load itself could be
|
||||
/// hoisted. Return the unfolded and hoistable load, or null if the load
|
||||
/// couldn't be unfolded or if it wouldn't be hoistable.
|
||||
MachineInstr *MachineLICM::ExtractHoistableLoad(MachineInstr *MI) {
|
||||
// Don't unfold simple loads.
|
||||
if (MI->canFoldAsLoad())
|
||||
@ -1285,6 +1216,9 @@ MachineInstr *MachineLICM::ExtractHoistableLoad(MachineInstr *MI) {
|
||||
return NewMIs[0];
|
||||
}
|
||||
|
||||
/// Initialize the CSE map with instructions that are in the current loop
|
||||
/// preheader that may become duplicates of instructions that are hoisted
|
||||
/// out of the loop.
|
||||
void MachineLICM::InitCSEMap(MachineBasicBlock *BB) {
|
||||
for (MachineBasicBlock::iterator I = BB->begin(),E = BB->end(); I != E; ++I) {
|
||||
const MachineInstr *MI = &*I;
|
||||
@ -1293,6 +1227,8 @@ void MachineLICM::InitCSEMap(MachineBasicBlock *BB) {
|
||||
}
|
||||
}
|
||||
|
||||
/// Find an instruction amount PrevMIs that is a duplicate of MI.
|
||||
/// Return this instruction if it's found.
|
||||
const MachineInstr*
|
||||
MachineLICM::LookForDuplicate(const MachineInstr *MI,
|
||||
std::vector<const MachineInstr*> &PrevMIs) {
|
||||
@ -1304,6 +1240,10 @@ MachineLICM::LookForDuplicate(const MachineInstr *MI,
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
/// Given a LICM'ed instruction, look for an instruction on the preheader that
|
||||
/// computes the same value. If it's found, do a RAU on with the definition of
|
||||
/// the existing instruction rather than hoisting the instruction to the
|
||||
/// preheader.
|
||||
bool MachineLICM::EliminateCSE(MachineInstr *MI,
|
||||
DenseMap<unsigned, std::vector<const MachineInstr*> >::iterator &CI) {
|
||||
// Do not CSE implicit_def so ProcessImplicitDefs can properly propagate
|
||||
@ -1361,8 +1301,8 @@ bool MachineLICM::EliminateCSE(MachineInstr *MI,
|
||||
return false;
|
||||
}
|
||||
|
||||
/// MayCSE - Return true if the given instruction will be CSE'd if it's
|
||||
/// hoisted out of the loop.
|
||||
/// Return true if the given instruction will be CSE'd if it's hoisted out of
|
||||
/// the loop.
|
||||
bool MachineLICM::MayCSE(MachineInstr *MI) {
|
||||
unsigned Opcode = MI->getOpcode();
|
||||
DenseMap<unsigned, std::vector<const MachineInstr*> >::iterator
|
||||
@ -1375,9 +1315,9 @@ bool MachineLICM::MayCSE(MachineInstr *MI) {
|
||||
return LookForDuplicate(MI, CI->second) != nullptr;
|
||||
}
|
||||
|
||||
/// Hoist - When an instruction is found to use only loop invariant operands
|
||||
/// When an instruction is found to use only loop invariant operands
|
||||
/// that are safe to hoist, this instruction is called to do the dirty work.
|
||||
///
|
||||
/// It returns true if the instruction is hoisted.
|
||||
bool MachineLICM::Hoist(MachineInstr *MI, MachineBasicBlock *Preheader) {
|
||||
// First check whether we should hoist this instruction.
|
||||
if (!IsLoopInvariantInst(*MI) || !IsProfitableToHoist(*MI)) {
|
||||
@ -1439,6 +1379,7 @@ bool MachineLICM::Hoist(MachineInstr *MI, MachineBasicBlock *Preheader) {
|
||||
return true;
|
||||
}
|
||||
|
||||
/// Get the preheader for the current loop, splitting a critical edge if needed.
|
||||
MachineBasicBlock *MachineLICM::getCurPreheader() {
|
||||
// Determine the block to which to hoist instructions. If we can't find a
|
||||
// suitable loop predecessor, we can't do any hoisting.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user