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DAGCombiner: Don't drop extension behavior when shrinking a load when unsafe.
ReduceLoadWidth unconditionally drops extensions from loads. Limit it to the case when all of the bits the extension would otherwise produce are dropped by the shrink. It would be possible to shrink the load in more cases by merging the extensions, but this isn't trivial and a very rare case. I left a TODO for that case. Fixes PR16551. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185755 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5220,6 +5220,13 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) {
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if (LN0->getNumValues() > 2)
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return SDValue();
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// If the load that we're shrinking is an extload and we're not just
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// discarding the extension we can't simply shrink the load. Bail.
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// TODO: It would be possible to merge the extensions in some cases.
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if (LN0->getExtensionType() != ISD::NON_EXTLOAD &&
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LN0->getMemoryVT().getSizeInBits() < ExtVT.getSizeInBits() + ShAmt)
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return SDValue();
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EVT PtrType = N0.getOperand(1).getValueType();
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if (PtrType == MVT::Untyped || PtrType.isExtended())
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@ -66,3 +66,26 @@ lor.end: ; preds = %lor.rhs, %entry
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%p = phi i1 [ true, %entry ], [ %tobool1, %lor.rhs ]
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ret i1 %p
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}
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@x = global { i8, i8, i8, i8, i8, i8, i8, i8 } { i8 1, i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 1 }, align 4
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; PR16551
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define void @test5(i32 %X) nounwind {
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entry:
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%bf.load = load i56* bitcast ({ i8, i8, i8, i8, i8, i8, i8, i8 }* @x to i56*), align 4
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%bf.lshr = lshr i56 %bf.load, 32
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%bf.cast = trunc i56 %bf.lshr to i32
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%cmp = icmp ne i32 %bf.cast, 1
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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tail call void @bar() nounwind
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br label %if.end
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if.end:
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ret void
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; CHECK: test5:
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; CHECK-NOT: cmpl $1,{{.*}}x+4
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; CHECK: ret
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}
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