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Make getClass more robust by adding cLong.
Add handling for Mul instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12450 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -143,7 +143,7 @@ FunctionPass *llvm::createSparcV8SimpleInstructionSelector(TargetMachine &TM) {
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}
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enum TypeClass {
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cByte, cShort, cInt, cFloat, cDouble
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cByte, cShort, cInt, cLong, cFloat, cDouble
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};
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static TypeClass getClass (const Type *T) {
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@ -151,6 +151,7 @@ static TypeClass getClass (const Type *T) {
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case Type::UByteTyID: case Type::SByteTyID: return cByte;
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case Type::UShortTyID: case Type::ShortTyID: return cShort;
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case Type::UIntTyID: case Type::IntTyID: return cInt;
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case Type::ULongTyID: case Type::LongTyID: return cLong;
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case Type::FloatTyID: return cFloat;
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case Type::DoubleTyID: return cDouble;
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default:
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@ -261,6 +262,11 @@ void V8ISel::visitBinaryOperator (BinaryOperator &I) {
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case Instruction::Sub:
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BuildMI (BB, V8::SUBrr, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
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break;
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case Instruction::Mul: {
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unsigned MulOpcode = I.getType ()->isSigned () ? V8::SMULrr : V8::UMULrr;
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BuildMI (BB, MulOpcode, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
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break;
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}
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default:
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visitInstruction (I);
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return;
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@ -143,7 +143,7 @@ FunctionPass *llvm::createSparcV8SimpleInstructionSelector(TargetMachine &TM) {
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}
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enum TypeClass {
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cByte, cShort, cInt, cFloat, cDouble
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cByte, cShort, cInt, cLong, cFloat, cDouble
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};
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static TypeClass getClass (const Type *T) {
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@ -151,6 +151,7 @@ static TypeClass getClass (const Type *T) {
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case Type::UByteTyID: case Type::SByteTyID: return cByte;
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case Type::UShortTyID: case Type::ShortTyID: return cShort;
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case Type::UIntTyID: case Type::IntTyID: return cInt;
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case Type::ULongTyID: case Type::LongTyID: return cLong;
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case Type::FloatTyID: return cFloat;
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case Type::DoubleTyID: return cDouble;
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default:
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@ -261,6 +262,11 @@ void V8ISel::visitBinaryOperator (BinaryOperator &I) {
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case Instruction::Sub:
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BuildMI (BB, V8::SUBrr, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
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break;
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case Instruction::Mul: {
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unsigned MulOpcode = I.getType ()->isSigned () ? V8::SMULrr : V8::UMULrr;
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BuildMI (BB, MulOpcode, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
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break;
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}
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default:
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visitInstruction (I);
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return;
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@ -143,7 +143,7 @@ FunctionPass *llvm::createSparcV8SimpleInstructionSelector(TargetMachine &TM) {
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}
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enum TypeClass {
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cByte, cShort, cInt, cFloat, cDouble
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cByte, cShort, cInt, cLong, cFloat, cDouble
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};
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static TypeClass getClass (const Type *T) {
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@ -151,6 +151,7 @@ static TypeClass getClass (const Type *T) {
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case Type::UByteTyID: case Type::SByteTyID: return cByte;
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case Type::UShortTyID: case Type::ShortTyID: return cShort;
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case Type::UIntTyID: case Type::IntTyID: return cInt;
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case Type::ULongTyID: case Type::LongTyID: return cLong;
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case Type::FloatTyID: return cFloat;
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case Type::DoubleTyID: return cDouble;
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default:
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@ -261,6 +262,11 @@ void V8ISel::visitBinaryOperator (BinaryOperator &I) {
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case Instruction::Sub:
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BuildMI (BB, V8::SUBrr, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
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break;
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case Instruction::Mul: {
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unsigned MulOpcode = I.getType ()->isSigned () ? V8::SMULrr : V8::UMULrr;
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BuildMI (BB, MulOpcode, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
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break;
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}
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default:
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visitInstruction (I);
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return;
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@ -143,7 +143,7 @@ FunctionPass *llvm::createSparcV8SimpleInstructionSelector(TargetMachine &TM) {
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}
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enum TypeClass {
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cByte, cShort, cInt, cFloat, cDouble
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cByte, cShort, cInt, cLong, cFloat, cDouble
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};
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static TypeClass getClass (const Type *T) {
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@ -151,6 +151,7 @@ static TypeClass getClass (const Type *T) {
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case Type::UByteTyID: case Type::SByteTyID: return cByte;
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case Type::UShortTyID: case Type::ShortTyID: return cShort;
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case Type::UIntTyID: case Type::IntTyID: return cInt;
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case Type::ULongTyID: case Type::LongTyID: return cLong;
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case Type::FloatTyID: return cFloat;
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case Type::DoubleTyID: return cDouble;
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default:
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@ -261,6 +262,11 @@ void V8ISel::visitBinaryOperator (BinaryOperator &I) {
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case Instruction::Sub:
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BuildMI (BB, V8::SUBrr, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
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break;
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case Instruction::Mul: {
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unsigned MulOpcode = I.getType ()->isSigned () ? V8::SMULrr : V8::UMULrr;
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BuildMI (BB, MulOpcode, 2, ResultReg).addReg (Op0Reg).addReg (Op1Reg);
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break;
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}
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default:
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visitInstruction (I);
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return;
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