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Fix r93758. Use isel patterns instead of c++ selection code to select rbit and make sure we pick different instructions for ARM vs. Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93829 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1680,12 +1680,6 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) {
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return CurDAG->getMachineNode(ARM::VMOVRRD, dl, MVT::i32, MVT::i32,
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N->getOperand(0), getAL(CurDAG),
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CurDAG->getRegister(0, MVT::i32));
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case ARMISD::RBIT: {
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EVT VT = N->getValueType(0);
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SDValue Ops[] = { N->getOperand(0),
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getAL(CurDAG), CurDAG->getRegister(0, MVT::i32) };
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return CurDAG->getMachineNode(ARM::RBIT, dl, VT, Ops, 3);
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}
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case ISD::UMUL_LOHI: {
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if (Subtarget->isThumb1Only())
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break;
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@ -107,6 +107,8 @@ def ARMMemBarrierV6 : SDNode<"ARMISD::MEMBARRIER", SDT_ARMMEMBARRIERV6,
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def ARMSyncBarrierV6 : SDNode<"ARMISD::SYNCBARRIER", SDT_ARMMEMBARRIERV6,
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[SDNPHasChain]>;
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def ARMrbit : SDNode<"ARMISD::RBIT", SDTIntUnaryOp>;
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//===----------------------------------------------------------------------===//
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// ARM Instruction Predicate Definitions.
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//
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@ -1456,7 +1458,9 @@ def CLZ : AMiscA1I<0b000010110, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
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}
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def RBIT : AMiscA1I<0b01101111, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
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"rbit", "\t$dst, $src", []>, Requires<[IsARM, HasV6T2]> {
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"rbit", "\t$dst, $src",
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[(set GPR:$dst, (ARMrbit GPR:$src))]>,
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Requires<[IsARM, HasV6T2]> {
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let Inst{7-4} = 0b0011;
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let Inst{11-8} = 0b1111;
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let Inst{19-16} = 0b1111;
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@ -1541,7 +1541,8 @@ def t2CLZ : T2I_misc<0b11, 0b00, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
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"clz", "\t$dst, $src", [(set GPR:$dst, (ctlz GPR:$src))]>;
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def t2RBIT : T2I_misc<0b01, 0b10, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
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"rbit", "\t$dst, $src", []>;
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"rbit", "\t$dst, $src",
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[(set GPR:$dst, (ARMrbit GPR:$src))]>;
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def t2REV : T2I_misc<0b01, 0b00, (outs GPR:$dst), (ins GPR:$src), IIC_iUNAr,
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"rev", ".w\t$dst, $src", [(set GPR:$dst, (bswap GPR:$src))]>;
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