From f691229384e9a29a9009d92f8b16abb988aa2357 Mon Sep 17 00:00:00 2001
From: Jim Grosbach <grosbach@apple.com>
Date: Fri, 6 Aug 2010 21:31:35 +0000
Subject: [PATCH] tidy up

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110476 91177308-0d34-0410-b5e6-96231b3b80d8
---
 include/llvm/CodeGen/Passes.h | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h
index 8e107ccac07..b9d97b185ae 100644
--- a/include/llvm/CodeGen/Passes.h
+++ b/include/llvm/CodeGen/Passes.h
@@ -30,23 +30,23 @@ namespace llvm {
   /// createUnreachableBlockEliminationPass - The LLVM code generator does not
   /// work well with unreachable basic blocks (what live ranges make sense for a
   /// block that cannot be reached?).  As such, a code generator should either
-  /// not instruction select unreachable blocks, or it can run this pass as it's
+  /// not instruction select unreachable blocks, or run this pass as its
   /// last LLVM modifying pass to clean up blocks that are not reachable from
   /// the entry block.
   FunctionPass *createUnreachableBlockEliminationPass();
 
   /// MachineFunctionPrinter pass - This pass prints out the machine function to
-  /// the given stream, as a debugging tool.
+  /// the given stream as a debugging tool.
   MachineFunctionPass *
   createMachineFunctionPrinterPass(raw_ostream &OS,
                                    const std::string &Banner ="");
 
   /// MachineLoopInfo pass - This pass is a loop analysis pass.
-  /// 
+  ///
   extern char &MachineLoopInfoID;
 
   /// MachineDominators pass - This pass is a machine dominators analysis pass.
-  /// 
+  ///
   extern char &MachineDominatorsID;
 
   /// PHIElimination pass - This pass eliminates machine instruction PHI nodes
@@ -55,7 +55,7 @@ namespace llvm {
   /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
   ///
   extern char &PHIEliminationID;
-  
+
   /// StrongPHIElimination pass - This pass eliminates machine instruction PHI
   /// nodes by inserting copy instructions.  This destroys SSA information, but
   /// is the desired input for some register allocators.  This pass is
@@ -114,7 +114,7 @@ namespace llvm {
   /// and eliminates abstract frame references.
   ///
   FunctionPass *createPrologEpilogCodeInserter();
-  
+
   /// LowerSubregs Pass - This pass lowers subregs to register-register copies
   /// which yields suboptimal, but correct code if the register allocator
   /// cannot coalesce all subreg operations during allocation.
@@ -145,27 +145,27 @@ namespace llvm {
   /// IntrinsicLowering Pass - Performs target-independent LLVM IR
   /// transformations for highly portable strategies.
   FunctionPass *createGCLoweringPass();
-  
+
   /// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in
   /// machine code. Must be added very late during code generation, just prior
   /// to output, and importantly after all CFG transformations (such as branch
   /// folding).
   FunctionPass *createGCMachineCodeAnalysisPass();
-  
+
   /// Deleter Pass - Releases GC metadata.
-  /// 
+  ///
   FunctionPass *createGCInfoDeleter();
-  
+
   /// Creates a pass to print GC metadata.
-  /// 
+  ///
   FunctionPass *createGCInfoPrinter(raw_ostream &OS);
-  
+
   /// createMachineCSEPass - This pass performs global CSE on machine
   /// instructions.
   FunctionPass *createMachineCSEPass();
 
   /// createMachineLICMPass - This pass performs LICM on machine instructions.
-  /// 
+  ///
   FunctionPass *createMachineLICMPass(bool PreRegAlloc = true);
 
   /// createMachineSinkingPass - This pass performs sinking on machine