diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index e43b33921b7..bbddad2d0ac 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -272,7 +272,7 @@ def memrix : Operand<iPTR> {   // memri where the imm is shifted 2 bits.
 
 // PowerPC Predicate operand.  20 = (0<<5)|20 = always, CR0 is a dummy reg
 // that doesn't matter.
-def pred : PredicateOperand<(ops imm, CRRC), (ops (i32 20), CR0)> {
+def pred : PredicateOperand<OtherVT, (ops imm, CRRC), (ops (i32 20), CR0)> {
   let PrintMethod = "printPredicateOperand";
 }
 
diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index f98c414d34c..d7723a546f1 100644
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -254,7 +254,7 @@ def i64imm : Operand<i64>;
 /// instruction.  OpTypes specifies the MIOperandInfo for the operand, and
 /// AlwaysVal specifies the value of this predicate when set to "always
 /// execute".
-class PredicateOperand<dag OpTypes, dag AlwaysVal> : Operand<OtherVT> {
+class PredicateOperand<ValueType ty, dag OpTypes, dag AlwaysVal> : Operand<ty> {
   let MIOperandInfo = OpTypes;
   dag ExecuteAlways = AlwaysVal;
 }