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Add a machine instruction flag indicating the instruction can clobber condition code / register(s) used to predicate instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37464 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-06-06 10:13:55 +00:00
parent 9fac0b5ff2
commit f94ab6a662
1 changed files with 6 additions and 0 deletions
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6
include/llvm/Target/TargetInstrInfo.h
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@ -82,6 +82,9 @@ const unsigned M_PREDICABLE = 1 << 12;
// at any time, e.g. constant generation, load from constant pool. // at any time, e.g. constant generation, load from constant pool.
const unsigned M_REMATERIALIZIBLE = 1 << 13; const unsigned M_REMATERIALIZIBLE = 1 << 13;
// M_CLOBBERS_PRED - Set if this instruction may clobbers the condition code
// register and / or registers that are used to predicate instructions.
const unsigned M_CLOBBERS_PRED = 1 << 14;
// Machine operand flags // Machine operand flags
// M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it // M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it
@ -211,6 +214,9 @@ public:
bool isPredicable(MachineOpCode Opcode) const { bool isPredicable(MachineOpCode Opcode) const {
return get(Opcode).Flags & M_PREDICABLE; return get(Opcode).Flags & M_PREDICABLE;
} }
bool clobbersPredicate(MachineOpCode Opcode) const {
return get(Opcode).Flags & M_CLOBBERS_PRED;
}
bool isReMaterializable(MachineOpCode Opcode) const { bool isReMaterializable(MachineOpCode Opcode) const {
return get(Opcode).Flags & M_REMATERIALIZIBLE; return get(Opcode).Flags & M_REMATERIALIZIBLE;
} }