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Add a machine instruction flag indicating the instruction can clobber condition code / register(s) used to predicate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37464 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -82,6 +82,9 @@ const unsigned M_PREDICABLE = 1 << 12;
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// at any time, e.g. constant generation, load from constant pool.
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const unsigned M_REMATERIALIZIBLE = 1 << 13;
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// M_CLOBBERS_PRED - Set if this instruction may clobbers the condition code
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// register and / or registers that are used to predicate instructions.
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const unsigned M_CLOBBERS_PRED = 1 << 14;
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// Machine operand flags
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// M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it
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@ -211,6 +214,9 @@ public:
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bool isPredicable(MachineOpCode Opcode) const {
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return get(Opcode).Flags & M_PREDICABLE;
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}
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bool clobbersPredicate(MachineOpCode Opcode) const {
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return get(Opcode).Flags & M_CLOBBERS_PRED;
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}
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bool isReMaterializable(MachineOpCode Opcode) const {
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return get(Opcode).Flags & M_REMATERIALIZIBLE;
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}
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