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[ARM] Add Cortex-A32 support

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Adding Cortex-A32 as an available target in the ARM backend.

Patch by Sam Parker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263956 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Renato Golin 2016-03-21 17:29:01 +00:00
parent 962167f0e2
commit faf3d27a21
4 changed files with 46 additions and 2 deletions
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1
include/llvm/Support/ARMTargetParser.def
View File

@ -215,6 +215,7 @@ ARM_CPU_NAME("sc300", AK_ARMV7M, FK_NONE, false, AEK_NONE)
ARM_CPU_NAME("cortex-m3", AK_ARMV7M, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("cortex-m4", AK_ARMV7EM, FK_FPV4_SP_D16, true, AEK_NONE)
ARM_CPU_NAME("cortex-m7", AK_ARMV7EM, FK_FPV5_D16, false, AEK_NONE)
ARM_CPU_NAME("cortex-a32", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
ARM_CPU_NAME("cortex-a35", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
ARM_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true, AEK_CRC)
ARM_CPU_NAME("cortex-a57", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)

8
lib/Target/ARM/ARM.td
View File

@ -252,6 +252,8 @@ def ProcA15 : SubtargetFeature<"a15", "ARMProcFamily", "CortexA15",
"Cortex-A15 ARM processors", []>;
def ProcA17 : SubtargetFeature<"a17", "ARMProcFamily", "CortexA17",
"Cortex-A17 ARM processors", []>;
def ProcA32 : SubtargetFeature<"a32", "ARMProcFamily", "CortexA32",
"Cortex-A32 ARM processors", []>;
def ProcA35 : SubtargetFeature<"a35", "ARMProcFamily", "CortexA35",
"Cortex-A35 ARM processors", []>;
def ProcA53 : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
@ -651,6 +653,12 @@ def : ProcNoItin<"cortex-m7", [ARMv7em,
FeatureFPARMv8,
FeatureD16]>;
def : ProcNoItin<"cortex-a32", [ARMv8a,
FeatureHWDiv,
FeatureHWDivARM,
FeatureT2XtPk,
FeatureCrypto,
FeatureCRC]>;
def : ProcNoItin<"cortex-a35", [ARMv8a, ProcA35,
FeatureHWDiv,

4
lib/Target/ARM/ARMSubtarget.h
View File

@ -43,8 +43,8 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
protected:
enum ARMProcFamilyEnum {
Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15,
CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexA35, CortexA53,
CortexA57, CortexA72, Krait, Swift, ExynosM1
CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexA32, CortexA35,
CortexA53, CortexA57, CortexA72, Krait, Swift, ExynosM1
};
enum ARMProcClassEnum {
None, AClass, RClass, MClass

35
test/CodeGen/ARM/build-attributes.ll
View File

@ -108,6 +108,9 @@
; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8
; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST
; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
@ -147,6 +150,8 @@
; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; ARMv8a (AArch32)
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
@ -1246,6 +1251,36 @@
; CORTEX-R8-FAST-NOT: .eabi_attribute 22
; CORTEX-R8-FAST: .eabi_attribute 23, 1
; CORTEX-A32: .cpu cortex-a32
; CORTEX-A32: .eabi_attribute 6, 14
; CORTEX-A32: .eabi_attribute 7, 65
; CORTEX-A32: .eabi_attribute 8, 1
; CORTEX-A32: .eabi_attribute 9, 2
; CORTEX-A32: .fpu crypto-neon-fp-armv8
; CORTEX-A32: .eabi_attribute 12, 3
; CORTEX-A32-NOT: .eabi_attribute 19
;; We default to IEEE 754 compliance
; CORTEX-A32: .eabi_attribute 20, 1
; CORTEX-A32: .eabi_attribute 21, 1
; CORTEX-A32-NOT: .eabi_attribute 22
; CORTEX-A32: .eabi_attribute 23, 3
; CORTEX-A32: .eabi_attribute 24, 1
; CORTEX-A32: .eabi_attribute 25, 1
; CORTEX-A32-NOT: .eabi_attribute 27
; CORTEX-A32-NOT: .eabi_attribute 28
; CORTEX-A32: .eabi_attribute 36, 1
; CORTEX-A32: .eabi_attribute 38, 1
; CORTEX-A32: .eabi_attribute 42, 1
; CORTEX-A32-NOT: .eabi_attribute 44
; CORTEX-A32: .eabi_attribute 68, 3
; CORTEX-A32-FAST-NOT: .eabi_attribute 19
;; The A32 has the ARMv8 FP unit, which always flushes preserving sign.
; CORTEX-A32-FAST: .eabi_attribute 20, 2
; CORTEX-A32-FAST-NOT: .eabi_attribute 21
; CORTEX-A32-FAST-NOT: .eabi_attribute 22
; CORTEX-A32-FAST: .eabi_attribute 23, 1
; CORTEX-A35: .cpu cortex-a35
; CORTEX-A35: .eabi_attribute 6, 14
; CORTEX-A35: .eabi_attribute 7, 65