RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-01-11 15:08:16 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Remove node ordering from inline asm nodes. It's not needed.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91961 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2009-12-23 00:47:20 +00:00
parent e5976b8c5c
commit fc67bbe7bc
1 changed files with 0 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -5868,8 +5868,6 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) {
Chain = DAG.getStore(Chain, getCurDebugLoc(), Chain = DAG.getStore(Chain, getCurDebugLoc(),
OpInfo.CallOperand, StackSlot, NULL, 0); OpInfo.CallOperand, StackSlot, NULL, 0);
OpInfo.CallOperand = StackSlot; OpInfo.CallOperand = StackSlot;
if (DisableScheduling)
DAG.AssignOrdering(Chain.getNode(), SDNodeOrder);
} }
// There is no longer a Value* corresponding to this operand. // There is no longer a Value* corresponding to this operand.
@ -5877,9 +5875,6 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) {
// It is now an indirect operand. // It is now an indirect operand.
OpInfo.isIndirect = true; OpInfo.isIndirect = true;
if (DisableScheduling)
DAG.AssignOrdering(OpInfo.CallOperand.getNode(), SDNodeOrder);
} }
// If this constraint is for a specific register, allocate it before // If this constraint is for a specific register, allocate it before
@ -6101,9 +6096,6 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) {
&AsmNodeOperands[0], AsmNodeOperands.size()); &AsmNodeOperands[0], AsmNodeOperands.size());
Flag = Chain.getValue(1); Flag = Chain.getValue(1);
if (DisableScheduling)
DAG.AssignOrdering(Chain.getNode(), SDNodeOrder);
// If this asm returns a register value, copy the result from that register // If this asm returns a register value, copy the result from that register
// and set it as the value of the call. // and set it as the value of the call.
if (!RetValRegs.Regs.empty()) { if (!RetValRegs.Regs.empty()) {
@ -6132,9 +6124,6 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) {
} }
assert(ResultType == Val.getValueType() && "Asm result value mismatch!"); assert(ResultType == Val.getValueType() && "Asm result value mismatch!");
if (DisableScheduling)
DAG.AssignOrdering(Val.getNode(), SDNodeOrder);
} }
setValue(CS.getInstruction(), Val); setValue(CS.getInstruction(), Val);
@ -6164,17 +6153,12 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) {
getValue(StoresToEmit[i].second), getValue(StoresToEmit[i].second),
StoresToEmit[i].second, 0); StoresToEmit[i].second, 0);
OutChains.push_back(Val); OutChains.push_back(Val);
if (DisableScheduling)
DAG.AssignOrdering(Val.getNode(), SDNodeOrder);
} }
if (!OutChains.empty()) if (!OutChains.empty())
Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other, Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other,
&OutChains[0], OutChains.size()); &OutChains[0], OutChains.size());
if (DisableScheduling)
DAG.AssignOrdering(Chain.getNode(), SDNodeOrder);
DAG.setRoot(Chain); DAG.setRoot(Chain);
} }