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[X86] AVX512: Simplify logic in isCDisp8
It was computing the VL/n case as: MemObjSize = VectorByteSize / ElemByteSize / Divider * ElemByteSize ElemByteSize not only falls out but VectorByteSize/Divider now actually matches the definition of VL/n. Also some formatting fixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212794 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -185,7 +185,8 @@ static bool isDisp8(int Value) {
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/// isCDisp8 - Return true if this signed displacement fits in a 8-bit
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/// compressed dispacement field.
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static bool isCDisp8(uint64_t TSFlags, int Value, int& CValue) {
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assert((TSFlags & X86II::EncodingMask) >> X86II::EncodingShift == X86II::EVEX &&
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assert(((TSFlags & X86II::EncodingMask) >>
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X86II::EncodingShift == X86II::EVEX) &&
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"Compressed 8-bit displacement is only valid for EVEX inst.");
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unsigned CD8E = (TSFlags >> X86II::EVEX_CD8EShift) & X86II::EVEX_CD8EMask;
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@ -195,7 +196,7 @@ static bool isCDisp8(uint64_t TSFlags, int Value, int& CValue) {
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CValue = Value;
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return isDisp8(Value);
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}
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unsigned MemObjSize = 1U << CD8E;
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if (CD8V & 4) {
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// Fixed vector length
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@ -208,10 +209,9 @@ static bool isCDisp8(uint64_t TSFlags, int Value, int& CValue) {
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EVEX_LL += ((TSFlags >> X86II::VEXShift) & X86II::EVEX_L2) ? 2 : 0;
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assert(EVEX_LL < 3 && "");
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unsigned NumElems = (1U << (EVEX_LL + 4)) / MemObjSize;
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NumElems /= 1U << (CD8V & 0x3);
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MemObjSize *= NumElems;
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unsigned VectorByteSize = 1U << (EVEX_LL + 4);
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unsigned Divider = 1U << (CD8V & 0x3);
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MemObjSize = VectorByteSize / Divider;
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}
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}
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