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Cleanup TableGen subtarget emitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165178 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -72,9 +72,6 @@ CodeGenSchedModels::CodeGenSchedModels(RecordKeeper &RK,
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// Infer new SchedClasses from SchedVariant.
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inferSchedClasses();
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DEBUG(for (unsigned i = 0; i < SchedClasses.size(); ++i)
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SchedClasses[i].dump(this));
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// Populate each CodeGenProcModel's WriteResDefs, ReadAdvanceDefs, and
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// ProcResourceDefs.
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collectProcResources();
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@ -475,7 +472,7 @@ void CodeGenSchedModels::collectSchedClasses() {
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RWI != RWE; ++RWI) {
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const CodeGenProcModel &ProcModel =
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getProcModel((*RWI)->getValueAsDef("SchedModel"));
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dbgs() << "InstrRW on " << ProcModel.ModelName << " for " << InstName;
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dbgs() << "InstRW on " << ProcModel.ModelName << " for " << InstName;
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IdxVec Writes;
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IdxVec Reads;
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findRWs((*RWI)->getValueAsListOfDefs("OperandReadWrites"),
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@ -11,6 +11,8 @@
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "subtarget-emitter"
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#include "CodeGenTarget.h"
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#include "CodeGenSchedule.h"
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#include "llvm/ADT/StringExtras.h"
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@ -769,6 +771,8 @@ void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel,
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std::vector<MCSchedClassDesc> &SCTab = SchedTables.ProcSchedClasses.back();
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for (CodeGenSchedModels::SchedClassIter SCI = SchedModels.schedClassBegin(),
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SCE = SchedModels.schedClassEnd(); SCI != SCE; ++SCI) {
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DEBUG(SCI->dump(&SchedModels));
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SCTab.resize(SCTab.size() + 1);
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MCSchedClassDesc &SCDesc = SCTab.back();
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// SCDesc.Name is guarded by NDEBUG
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@ -817,8 +821,8 @@ void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel,
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}
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}
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else if (!SCI->InstRWs.empty()) {
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assert(SCI->Writes.empty() && SCI->Reads.empty() &&
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"InstRW class should not have its own ReadWrites");
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// This class may have a default ReadWrite list which can be overriden by
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// InstRW definitions.
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Record *RWDef = 0;
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for (RecIter RWI = SCI->InstRWs.begin(), RWE = SCI->InstRWs.end();
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RWI != RWE; ++RWI) {
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