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Move AArch64TargetLowering to AArch64Subtarget.
This currently necessitates a TargetMachine for the TargetLowering constructor and TLOF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210605 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -74,7 +74,7 @@ static TargetLoweringObjectFile *createTLOF(const Triple &TT) {
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return new AArch64_ELFTargetObjectFile();
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}
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AArch64TargetLowering::AArch64TargetLowering(AArch64TargetMachine &TM)
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AArch64TargetLowering::AArch64TargetLowering(TargetMachine &TM)
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: TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))) {
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Subtarget = &TM.getSubtarget<AArch64Subtarget>();
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@ -197,7 +197,7 @@ class AArch64TargetLowering : public TargetLowering {
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bool RequireStrictAlign;
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public:
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explicit AArch64TargetLowering(AArch64TargetMachine &TM);
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explicit AArch64TargetLowering(TargetMachine &TM);
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/// Selects the correct CCAssignFn for a the given CallingConvention
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/// value.
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@ -32,7 +32,8 @@ EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if "
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AArch64Subtarget::AArch64Subtarget(const std::string &TT,
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const std::string &CPU,
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const std::string &FS, bool LittleEndian)
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const std::string &FS, TargetMachine &TM,
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bool LittleEndian)
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: AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
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HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
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HasZeroCycleRegMove(false), HasZeroCycleZeroing(false), CPUString(CPU),
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@ -51,6 +52,7 @@ AArch64Subtarget::AArch64Subtarget(const std::string &TT,
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CPUString = "generic";
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ParseSubtargetFeatures(CPUString, FS);
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TLInfo = make_unique<AArch64TargetLowering>(TM);
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}
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/// ClassifyGlobalReference - Find the target operand flags that describe
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@ -16,6 +16,7 @@
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#include "AArch64InstrInfo.h"
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#include "AArch64FrameLowering.h"
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#include "AArch64ISelLowering.h"
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#include "AArch64RegisterInfo.h"
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#include "AArch64SelectionDAGInfo.h"
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#include "llvm/IR/DataLayout.h"
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@ -57,17 +58,21 @@ protected:
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AArch64FrameLowering FrameLowering;
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AArch64InstrInfo InstrInfo;
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AArch64SelectionDAGInfo TSInfo;
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std::unique_ptr<AArch64TargetLowering> TLInfo;
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public:
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/// This constructor initializes the data members to match that
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/// of the specified triple.
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AArch64Subtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS, bool LittleEndian);
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const std::string &FS, TargetMachine &TM, bool LittleEndian);
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const AArch64SelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
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const AArch64FrameLowering *getFrameLowering() const {
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return &FrameLowering;
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}
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const AArch64TargetLowering *getTargetLowering() const {
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return TLInfo.get();
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}
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const AArch64InstrInfo *getInstrInfo() const { return &InstrInfo; }
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const DataLayout *getDataLayout() const { return &DL; }
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bool enableMachineScheduler() const override { return true; }
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@ -77,7 +77,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT,
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CodeGenOpt::Level OL,
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bool LittleEndian)
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: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
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Subtarget(TT, CPU, FS, LittleEndian), TLInfo(*this) {
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Subtarget(TT, CPU, FS, *this, LittleEndian) {
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initAsmInfo();
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}
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@ -29,9 +29,6 @@ class AArch64TargetMachine : public LLVMTargetMachine {
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protected:
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AArch64Subtarget Subtarget;
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private:
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AArch64TargetLowering TLInfo;
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public:
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AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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@ -42,7 +39,7 @@ public:
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return &Subtarget;
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}
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const AArch64TargetLowering *getTargetLowering() const override {
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return &TLInfo;
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return getSubtargetImpl()->getTargetLowering();
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}
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const DataLayout *getDataLayout() const override {
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return getSubtargetImpl()->getDataLayout();
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