Move AArch64TargetLowering to AArch64Subtarget.

This currently necessitates a TargetMachine for the TargetLowering
constructor and TLOF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210605 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2014-06-10 23:26:45 +00:00
parent 63ce00b72f
commit fe80185273
6 changed files with 13 additions and 9 deletions

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@ -74,7 +74,7 @@ static TargetLoweringObjectFile *createTLOF(const Triple &TT) {
return new AArch64_ELFTargetObjectFile();
}
AArch64TargetLowering::AArch64TargetLowering(AArch64TargetMachine &TM)
AArch64TargetLowering::AArch64TargetLowering(TargetMachine &TM)
: TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))) {
Subtarget = &TM.getSubtarget<AArch64Subtarget>();

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@ -197,7 +197,7 @@ class AArch64TargetLowering : public TargetLowering {
bool RequireStrictAlign;
public:
explicit AArch64TargetLowering(AArch64TargetMachine &TM);
explicit AArch64TargetLowering(TargetMachine &TM);
/// Selects the correct CCAssignFn for a the given CallingConvention
/// value.

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@ -32,7 +32,8 @@ EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if "
AArch64Subtarget::AArch64Subtarget(const std::string &TT,
const std::string &CPU,
const std::string &FS, bool LittleEndian)
const std::string &FS, TargetMachine &TM,
bool LittleEndian)
: AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
HasZeroCycleRegMove(false), HasZeroCycleZeroing(false), CPUString(CPU),
@ -51,6 +52,7 @@ AArch64Subtarget::AArch64Subtarget(const std::string &TT,
CPUString = "generic";
ParseSubtargetFeatures(CPUString, FS);
TLInfo = make_unique<AArch64TargetLowering>(TM);
}
/// ClassifyGlobalReference - Find the target operand flags that describe

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@ -16,6 +16,7 @@
#include "AArch64InstrInfo.h"
#include "AArch64FrameLowering.h"
#include "AArch64ISelLowering.h"
#include "AArch64RegisterInfo.h"
#include "AArch64SelectionDAGInfo.h"
#include "llvm/IR/DataLayout.h"
@ -57,17 +58,21 @@ protected:
AArch64FrameLowering FrameLowering;
AArch64InstrInfo InstrInfo;
AArch64SelectionDAGInfo TSInfo;
std::unique_ptr<AArch64TargetLowering> TLInfo;
public:
/// This constructor initializes the data members to match that
/// of the specified triple.
AArch64Subtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool LittleEndian);
const std::string &FS, TargetMachine &TM, bool LittleEndian);
const AArch64SelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
const AArch64FrameLowering *getFrameLowering() const {
return &FrameLowering;
}
const AArch64TargetLowering *getTargetLowering() const {
return TLInfo.get();
}
const AArch64InstrInfo *getInstrInfo() const { return &InstrInfo; }
const DataLayout *getDataLayout() const { return &DL; }
bool enableMachineScheduler() const override { return true; }

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@ -77,7 +77,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT,
CodeGenOpt::Level OL,
bool LittleEndian)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, LittleEndian), TLInfo(*this) {
Subtarget(TT, CPU, FS, *this, LittleEndian) {
initAsmInfo();
}

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@ -29,9 +29,6 @@ class AArch64TargetMachine : public LLVMTargetMachine {
protected:
AArch64Subtarget Subtarget;
private:
AArch64TargetLowering TLInfo;
public:
AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
@ -42,7 +39,7 @@ public:
return &Subtarget;
}
const AArch64TargetLowering *getTargetLowering() const override {
return &TLInfo;
return getSubtargetImpl()->getTargetLowering();
}
const DataLayout *getDataLayout() const override {
return getSubtargetImpl()->getDataLayout();