701 Commits

Author SHA1 Message Date
Heejin Ahn bb8c53976b [WebAssembly] Support for atomic stores
Summary: Add support for atomic store instructions.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D48839

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336145 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-02 21:22:59 +00:00
Dan Gohman df015f19fc [WebAssembly] Fix fast-isel optimization of branch conditions.
LLVM doesn't guarantee anything about the high bits of a register holding
an i1 value at the IR level, so don't translate LLVM IR i1 values directly
into WebAssembly conditional branch operands. WebAssembly's conditional
branches do demand all 32 bits be valid.

Fixes PR38019.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336138 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-02 19:45:57 +00:00
Heejin Ahn d231261141 [WebAssembly] Comment out a switch block in ISelDAGToDAG
Summary: Fixes PR37977.

Reviewers: RKSimon

Subscribers: dschuff, sbc100, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D48737

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336017 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-29 21:19:22 +00:00
Simon Pilgrim abd5dd61fc [WebAssembly] Add getSetCCResultType placeholder override to handle vector compare results.
Necessary to get the rL335821 bugfix (which was reverted at rL335871) un-reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335884 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 17:27:09 +00:00
Dan Gohman 2da9f1a84d [WebAssembly] Fix lowering of varargs functions with non-legal fixed arguments.
CallLoweringInfo's NumFixedArgs field gives the number of fixed arguments
before legalization. The ISD::OutputArg "Outs" array holds legalized
arguments, so when indexing into it to find the non-fixed arguemn, we need
to use the number of arguments after legalization.

Fixes PR37934.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335576 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-26 03:18:38 +00:00
Dan Gohman 0135f2ae72 [WebAssembly] Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335574 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-26 03:03:41 +00:00
Heejin Ahn ad04e25e24 [WebAssembly] Add WebAssemblyException information analysis
Summary:
A WebAssemblyException object contains BBs that belong to a 'catch' part
of the try-catch-end structure. Because CFGSort requires all the BBs
within a catch part to be sorted together as it does for loops, this
pass calculates the nesting structure of catch part of exceptions in a
function. Now this assumes the use of Windows EH instructions.

Reviewers: dschuff, majnemer

Subscribers: jfb, mgorny, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D44134

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335439 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-25 01:20:21 +00:00
Heejin Ahn 6aa7ab2443 [WebAssembly] Add WebAssemblyLateEHPrepare pass
Summary:
Add WebAssemblyLateEHPrepare pass that does several small jobs for
exception handling. This runs before CFGSort, and is different from
WasmEHPrepare pass that runs before ISel, even though the names are
similar.

Reviewers: dschuff, majnemer

Subscribers: sbc100, jgravelle-google, sunfish, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D46803

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335438 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-25 01:07:11 +00:00
Sam Clegg 9d9298bf57 [WebAssembly] Update know failures for the wasm waterfall
Summary:
The waterfall no longer builds .s files and no longers uses
the wasm-o when it builds object files.

Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D48371

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335135 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-20 15:17:12 +00:00
Heejin Ahn a587557962 [WebAssembly] Fix liveness tracking info after drop insertion
Summary:
This fixes liveness tracking information after `drop` instruction
insertion in ExplicitLocals pass.

When a drop instruction is inserted to drop a dead register operand, the
original operand should be marked not dead anymore because it is now
used by the new drop instruction. And the operand to the new drop
instruction should be marked killed instead. This bug caused some
programs to fail when `llc` is run with `-verify-machineinstrs` option.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D48253

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335074 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-19 20:30:42 +00:00
Heejin Ahn dba082adc8 [WebAssembly] Add more utility functions
Summary:
Added more utility functions that will be used in EH-related passes Also
changed `LoopBottom` function to `getBottom` and uses templates to be
able to handle other classes as well, which will be used in CFGSort
later.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D48262

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335006 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-19 00:32:03 +00:00
Heejin Ahn f1fc1ae9b7 [WebAssembly] Make rethrow instruction take a target BB argument
Summary:
This patch changes the rethrow instruction to take a BB argument in LLVM
backend, like `br` and `br_if`s. This BB is a target catch BB the
rethrow instruction unwinds to. This BB argument will be converted to an
relative depth immediate at the end of CFGStackify pass, as in the same
way of branches.

RETHROW_TO_CALLER is a codegen-only instruction that should be used when
a rethrow instruction does not have an unwind destination BB, i.e., it
should rethrow to its caller function.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D48260

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334998 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-18 23:54:29 +00:00
Wouter van Oortmerssen 17406f3a2a [WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.
Summary:
One for register based, much like the existing definitions,
and one for stack based (suffix _S).

This allows us to use registers in most of LLVM (which works better),
and stack based in MC (which results in a simpler and more readable
assembler / disassembler).

Tried to keep this change as small as possible while passing tests,
follow-up commit will:
- Add reg->stack conversion in MI.
- Fix asm/disasm in MC to be stack based.
- Fix emitter to be stack based.

tests passing:
llvm-lit -v `find test -name WebAssembly`

test/CodeGen/WebAssembly
test/MC/WebAssembly
test/MC/Disassembler/WebAssembly
test/DebugInfo/WebAssembly
test/CodeGen/MIR/WebAssembly
test/tools/llvm-objdump/WebAssembly

Reviewers: dschuff, sbc100, jgravelle-google, sunfish

Subscribers: aheejin, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D48183

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334985 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-18 21:22:44 +00:00
Wouter van Oortmerssen 2fff458e8e [WebAssembly] Cleaned up register accessors in WebAssemblyMachineFunctionInfo.h
Tested: llvm-lit -v `find test -name WebAssembly`

(This is a commit access "test commit" :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334979 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-18 20:45:49 +00:00
Heejin Ahn 011c97ec87 [WebAssembly] Simple comment fix. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334899 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-17 00:37:56 +00:00
Ilya Biryukov 16b3cbe7f0 Fix compilation of WebAssembly and RISCV after r334078
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334085 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-06 10:57:50 +00:00
Derek Schuff 3bc04090d3 Simplified WebAssemblyAsmBackend by removing explicit ELF variant.
The ELF version was broken (does not deal with wasm specific fixups),
and now is slightly less broken. It will be removed in its entirety
in the future which this change makes slightly easier (just remove
the IsELF bool).

Differential Revision: https://reviews.llvm.org/D47745

Patch by Wouter van Oortmerssen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333964 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-04 22:53:36 +00:00
Sam Clegg 65da601c2d [WebAssembly] Fix .td files after rL333900
Differential Revision: https://reviews.llvm.org/D47727

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333928 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-04 16:59:26 +00:00
Dan Gohman 238f816f4c [WebAssembly] Update to the new names for the memory intrinsics.
The WebAssembly committee has decided on the names `memory.size` and
`memory.grow` for the memory intrinsics, so update the LLVM intrinsics to
follow those names, keeping both sets of old names in place for
compatibility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333708 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-31 22:35:25 +00:00
Dan Gohman fa719da681 [WebAssembly] Fix the signatures for the __mulo* libcalls.
The __mulo* libcalls have an extra i32* to return the overflow value.

Fixes PR37401.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333706 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-31 22:27:24 +00:00
Heejin Ahn 60c0443a11 [WebAssembly] Support instruction selection for catching exceptions
Summary:
This lowers exception catching-related instructions:
1. Lowers `wasm.catch` intrinsic to `catch` instruction
2. Removes `catchpad` and `cleanuppad` instructions; they are not
necessary after isel phase. (`MachineBasicBlock::isEHFuncletEntry()` or
`MachineBasicBlock::isEHPad()` can be used instead.)
3. Lowers `catchret` and `cleanupret` instructions to pseudo `catchret`
and `cleanupret` instructions in isel, which will be replaced with other
instructions in `WebAssemblyExceptionPrepare` pass.
4. Adds 'WebAssemblyExceptionPrepare` pass, which is for running various
transformation for EH. Currently this pass only replaces `catchret` and
`cleanupret` instructions into appropriate wasm instructions to make
this patch successfully run until the end.

Currently this does not handle lowering of intrinsics related to LSDA
info generation (`wasm.landingpad.index` and `wasm.lsda`), because they
cannot be tested without implementing `EHStreamer`'s wasm-specific
handlers. They are marked as TODO, which is needed to make isel pass.
Also this does not generate `try` and `end_try` markers yet, which will
be handled in later patches.

This patch is based on the first wasm EH proposal.
(https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md)

Reviewers: dschuff, majnemer

Subscribers: jfb, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D44090

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333705 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-31 22:25:54 +00:00
Dan Gohman b77633aafe [WebAssembly] Fix fast-isel lowering illegal argument and return types.
For both argument and return types, promote illegal types like i24 to i32,
and if a type can't be easily promoted, clear out the signature before
bailing out, so avoid leaving it in a partially complete state.

Fixes PR37546.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332947 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-22 04:58:36 +00:00
Peter Collingbourne 09ac21d393 MC: Separate creating a generic object writer from creating a target object writer. NFCI.
With this we gain a little flexibility in how the generic object
writer is created.

Part of PR37466.

Differential Revision: https://reviews.llvm.org/D47045

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332868 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-21 19:20:29 +00:00
Peter Collingbourne a8e9721d8d MC: Change MCAsmBackend::writeNopData() to take a raw_ostream instead of an MCObjectWriter. NFCI.
To make this work I needed to add an endianness field to MCAsmBackend
so that writeNopData() implementations know which endianness to use.

Part of PR37466.

Differential Revision: https://reviews.llvm.org/D47035

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332857 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-21 17:57:19 +00:00
Peter Collingbourne a68d4cc279 Support: Simplify endian stream interface. NFCI.
Provide some free functions to reduce verbosity of endian-writing
a single value, and replace the endianness template parameter with
a field.

Part of PR37466.

Differential Revision: https://reviews.llvm.org/D47032

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332757 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-18 19:46:24 +00:00
Dan Gohman bf20a75b81 [WebAssembly] Fix the opcode number for i64.load16_u.
Fixes PR37488.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332561 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-17 00:14:13 +00:00
Nicola Zaghen 0818e789cb Rename DEBUG macro to LLVM_DEBUG.
The DEBUG() macro is very generic so it might clash with other projects.
The renaming was done as follows:
- git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g'
- git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM
- Manual change to APInt
- Manually chage DOCS as regex doesn't match it.

In the transition period the DEBUG() macro is still present and aliased
to the LLVM_DEBUG() one.

Differential Revision: https://reviews.llvm.org/D43624



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332240 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-14 12:53:11 +00:00
Sam Clegg 04cf0d7c9c [WebAssembly] Initial Disassembler.
This implements a new table-gen emitter to create tables for
a wasm disassembler, and a dissassembler to use them.

Comes with 2 tests, that tests a few instructions manually. Is also able to
disassemble large .wasm files with objdump reasonably.

Not working so well, to be addressed in followups:
- objdump appears to be passing an incorrect starting point.
- since the disassembler works an instruction at a time, and it is
  disassembling stack instruction, it has no idea of pseudo register assignments.
  These registers are required for the instruction printing code that follows.
  For now, all such registers appear in the output as $0.

Patch by Wouter van Oortmerssen

Differential Revision: https://reviews.llvm.org/D45848

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332052 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-10 22:16:44 +00:00
Shiva Chen 24abe71d71 [DebugInfo] Examine all uses of isDebugValue() for debug instructions.
Because we create a new kind of debug instruction, DBG_LABEL, we need to
check all passes which use isDebugValue() to check MachineInstr is debug
instruction or not. When expelling debug instructions, we should expel
both DBG_VALUE and DBG_LABEL. So, I create a new function,
isDebugInstr(), in MachineInstr to check whether the MachineInstr is
debug instruction or not.

This patch has no new test case. I have run regression test and there is
no difference in regression test.

Differential Revision: https://reviews.llvm.org/D45342

Patch by Hsiangkai Wang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331844 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-09 02:42:00 +00:00
Adrian Prantl 26b584c691 Remove \brief commands from doxygen comments.
We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they are a visual distraction and we don't want to
encourage more \brief markers in new code either, this patch removes
them all.

Patch produced by

  for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done

Differential Revision: https://reviews.llvm.org/D46290

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331272 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-01 15:54:18 +00:00
Sam Clegg db15975983 [WebAssembly] Write DWARF data into wasm object file
- Writes ".debug_XXX" into corresponding custom sections.
- Writes relocation records into "reloc.debug_XXX" sections.

Patch by Yury Delendik!

Differential Revision: https://reviews.llvm.org/D44184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330982 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-26 19:27:28 +00:00
Heejin Ahn 51d5ef9dba [WebAssembly] Add an assertion for an invalid CFG
Summary:
It was not easy to provide a test case for D45648 (rL330079) because the bug
didn't manifest itself in the set of currently valid IRs. Added an assertion to
check this faster, thanks to @dblaikie's suggestion.

Reviewers: dblaikie

Subscribers: jfb, dschuff, sbc100, jgravelle-google, llvm-commits, dblaikie

Differential Revision: https://reviews.llvm.org/D45711

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330217 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-17 21:19:21 +00:00
Dan Gohman 7f57949cd0 [WebAssembly] Teach fast-isel to gracefully recover from illegal return types.
Fixes PR36564.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330215 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-17 20:46:42 +00:00
Heejin Ahn 1076c8db45 [WebAssembly] Fix a bug in MachineBasicBlock::findDebugLoc() call
Summary:
InsertPos is within the bacic block `Header`, so `findDebugLoc()` should
be called on not `MBB` but `Header` instead.

Reviewers: yurydelendik

Subscribers: jfb, dschuff, aprantl, sbc100, jgravelle-google, sunfish, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D45648

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330079 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-14 00:12:12 +00:00
Mandeep Singh Grang 52da6c5703 [WebAssembly] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: sunfish, RKSimon

Reviewed By: sunfish

Subscribers: jfb, dschuff, sbc100, jgravelle-google, aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D44873

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329607 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-09 19:38:31 +00:00
Sam Clegg 13c09234d6 [WebAssembly] Allow for the creation of user-defined custom sections
This patch adds a way for users to create their own custom sections to
be added to wasm files. At the LLVM IR layer, they are defined through
the "wasm.custom_sections" named metadata. The expected use case for
this is bindings generators such as wasm-bindgen.

Patch by Dan Gohman

Differential Revision: https://reviews.llvm.org/D45297

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329315 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-05 17:01:39 +00:00
Sam Clegg 5539442a8f [WebAssembly] Only write 32-bits for WebAssembly::OPERAND_OFFSET32
A bug was found where an offset of -1 would generate an encoding
of max int64 which is invalid in the binary format.

Differential Revision: https://reviews.llvm.org/D45280

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329238 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-04 22:27:58 +00:00
Nico Weber 2141b4692f Sort targetgen calls in lib/Target/*/CMakeLists.
Makes it easier to see mistakes such as the one fixed in r329178 and makes
the different target CMakeLists more consistent.

Also remove some stale-looking comments from the Nios2 target cmakefile.

No intended behavior change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329181 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-04 12:37:44 +00:00
Jun Bum Lim c23bb98c0a [CodeGen]Add NoVRegs property on PostRASink and ShrinkWrap
Summary:
This change declare that PostRAMachineSinking and ShrinkWrap require NoVRegs
property, so now the MachineFunctionPass can enforce this check.
These passes are disabled in NVPTX & WebAssembly.

Reviewers: dschuff, jlebar, tra, jgravelle-google, MatzeB, sebpop, thegameg, mcrosier

Reviewed By: dschuff, thegameg

Subscribers: jholewinski, jfb, sbc100, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D45183

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329095 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-03 18:17:34 +00:00
Jacob Gravelle 95561668f0 [WebAssembly] Register wasm passes with the PassRegistry
Summary:
This exposes WebAssembly passes for use on the command line (as
arguments to -print-before and the like).

Reviewers: dschuff, sunfish

Subscribers: MatzeB, jfb, sbc100, llvm-commits, aheejin

Differential Revision: https://reviews.llvm.org/D45103

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328901 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-30 20:36:58 +00:00
Derek Schuff 97f19f4b51 [WebAssembly] Refactor tablegen for store instructions (NFC)
Summary: Add patterns similar to loads.

Differential Revision: https://reviews.llvm.org/D45064

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328876 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-30 17:02:50 +00:00
David Blaikie 49ca55e381 Transforms: Introduce Transforms/Utils.h rather than spreading the declarations amongst Scalar.h and IPO.h
Fixes layering - Transforms/Utils shouldn't depend on including a Scalar
or IPO header, because Scalar and IPO depend on Utils.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328717 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-28 17:44:36 +00:00
David Blaikie 9d9a46a465 Fix layering of MachineValueType.h by moving it from CodeGen to Support
This is used by llvm tblgen as well as by LLVM Targets, so the only
common place is Support for now. (maybe we need another target for these
sorts of things - but for now I'm at least making them correct & we can
make them better if/when people have strong feelings)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328395 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-23 23:58:25 +00:00
Reid Kleckner 94fa4665a6 [WebAssembly] Really disable wasm register name matcher
The "ShouldEmitMatchRegisterName" bit wasn't taking effect because the
WebAssembly target didn't point to the custom WebAssemblyAsmParser
record.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328155 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-21 21:46:47 +00:00
Reid Kleckner fec64ebeba [WebAssembly] Suppress unused function warning for register name matcher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328112 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-21 16:20:58 +00:00
Derek Schuff cce5a27f7d [WebAssembly] Update torture compile test expectations
The tests compile after r328049

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328057 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-20 23:00:13 +00:00
Derek Schuff c3f6be5350 [WebAssembly] Strip threadlocal attribute from globals in single thread mode
The default thread model for wasm is single, and in this mode thread-local
global variables can be lowered identically to non-thread-local variables.

Differential Revision: https://reviews.llvm.org/D44703

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328049 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-20 22:01:32 +00:00
Derek Schuff a17749935c [WebAssembly] Added initial AsmParser implementation.
It uses the MC framework and the tablegen matcher to do the
heavy lifting. Can handle both explicit and implicit locals
(-disable-wasm-explicit-locals). Comes with a small regression
test.

This is a first basic implementation that can parse most llvm .s
output and round-trips most instructions succesfully, but in order
to keep the commit small, does not address all issues.

There are a fair number of mismatches between what MC / assembly
matcher think a "CPU" should look like and what WASM provides,
some already have workarounds in this commit (e.g. the way it
deals with register operands) and some that require further work.
Some of that further work may involve changing what the
Disassembler outputs (and what s2wasm parses), so are probably
best left to followups.

Some known things missing:
- Many directives are ignored and not emitted.
- Vararg calls are parsed but extra args not emitted.
- Loop signatures are likely incorrect.
- $drop= is not emitted.
- Disassembler does not output SIMD types correctly, so assembler
  can't test them.

Patch by Wouter van Oortmerssen

Differential Revision: https://reviews.llvm.org/D44329

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328028 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-20 20:06:35 +00:00
Derek Schuff 1695e783fb [WebAssembly] Add DebugLoc information to WebAssembly block and loop.
Patch by Yury Delendik
Differential Revision: https://reviews.llvm.org/D44448

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327673 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-15 22:06:51 +00:00
Heejin Ahn df76a89533 [WebAssembly] Add except_ref as a first-class type
Summary: Add except_ref as a first-class type, according to the [[https://github.com/WebAssembly/exception-handling/blob/master/proposals/Level-1.md | Level 1 exception handling proposal ]].

Reviewers: dschuff

Subscribers: jfb, sbc100, llvm-commits

Differential Revision: https://reviews.llvm.org/D43706

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326985 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-08 04:05:37 +00:00