Commit Graph

87825 Commits

Author SHA1 Message Date
Patrik Hagglund
319bb39923 Change TargetLowering::getTypeToPromoteTo to take and return MVTs,
instead of EVTs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170529 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 11:21:04 +00:00
Benjamin Kramer
8b7c89f2d4 LoopVectorize: Make iteration over induction variables not depend on pointer values.
MapVector is a bit heavyweight, but I don't see a simpler way. Also the
InductionList is unlikely to be large. This should help 3-stage selfhost
compares (PR14647).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170528 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 11:09:15 +00:00
Benjamin Kramer
fc8657be34 MapVector: Add lookup().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 11:08:33 +00:00
Patrik Hagglund
fdbeb057b8 Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170524 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 10:19:55 +00:00
NAKAMURA Takumi
16537418f4 X86ISelLowering.cpp: Fix warnings. [-Wlogical-op-parentheses]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170523 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 10:12:48 +00:00
Patrik Hagglund
9c5ab9355e Change TargetLowering::getCondCodeAction to take an MVT, instead of
EVT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170522 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 10:09:26 +00:00
Bill Wendling
6424a783ad Inline hasFunctionOnlyAttrs into its only use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170518 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 09:15:11 +00:00
Bill Wendling
5d122b6ec0 Inline the only use of the hasParameterOnlyAttrs method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170517 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 09:04:58 +00:00
Bill Wendling
1d3dcfe424 Inline the 'hasIncompatibleWithVarArgsAttrs' method into its only uses. And some minor comment reformatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170516 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 08:57:40 +00:00
Nadav Rotem
0575429d14 DOC: fix the url format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170513 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 08:43:05 +00:00
Patrik Hagglund
88ef514cc6 Change TargetLowering::getTruncStoreAction to take MVTs, instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170510 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 08:28:51 +00:00
Nadav Rotem
67a6ec87be DOC: add a benchmarks that compares us to gcc and icc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170509 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 08:28:24 +00:00
Elena Demikhovsky
4b977312c7 Optimized load + SIGN_EXTEND patterns in the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170506 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 07:50:20 +00:00
Nadav Rotem
bf5a2c6a39 After reducing the size of an operation in the DAG we zero-extend the reduced
bitwidth op back to the original size. If we reduce ANDs then this can cause
an endless loop. This patch changes the ZEXT to ANY_EXTEND if the demanded bits
are equal or smaller than the size of the reduced operation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170505 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 07:39:08 +00:00
Nadav Rotem
af08627af5 docs: fix typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170504 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 07:36:35 +00:00
Nadav Rotem
59f2af9246 DOC: Add a webpage that describes the loop and bb vectorizers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170503 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 07:22:24 +00:00
Bill Wendling
034b94b170 Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170502 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 07:18:57 +00:00
Craig Topper
85022561f9 Remove more of 'else's after 'returns'. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170497 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 06:43:58 +00:00
Craig Topper
a1b3c03777 Remove a bunch of 'else's after 'returns'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170496 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 06:39:17 +00:00
Craig Topper
40b4a81ab0 Teach SimplifySetCC that comparing AssertZext i1 against a constant 1 can be rewritten as a compare against a constant 0 with the opposite condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170495 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 06:12:28 +00:00
Reed Kotler
95f475f2ec Add some missing Defs and Uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170493 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 04:06:15 +00:00
Shuxin Yang
d6b51d1dc1 Make sure the buffer, which containas an instance of APFloat, has proper alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170486 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 01:10:17 +00:00
Kevin Enderby
5469f605fe Add to the disassembler C API an option to print the disassembled
instructions in the assembly code variant if one exists.

The intended use for this is so tools like lldb and darwin's otool(1)
can be switched to print Intel-flavored disassembly.

I discussed extensively this API with Jim Grosbach and we feel
while it may not be fully general, in reality there is only one syntax
for each assembly with the exception of X86 which has exactly
two for historical reasons.

rdar://10989182


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170477 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 23:47:28 +00:00
Jakob Stoklund Olesen
445a02b5ad Remove MachineInstr::setIsInsideBundle().
The bundle flags are now maintained by the slightly higher-level
functions bundleWithPred() / bundleWithSucc() which enforce consistent
bundle flags between neighboring instructions.

See also MIBundleBuilder for an even higher-level approach to building
bundles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170475 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 23:40:14 +00:00
Jakob Stoklund Olesen
2e4b639790 Use bidirectional bundle flags to simplify important functions.
The bundle_iterator::operator++ function now doesn't need to dig out the
basic block and check against end(). It can use the isBundledWithSucc()
flag to find the last bundled instruction safely.

Similarly, MachineInstr::isBundled() no longer needs to look at
iterators etc. It only has to look at flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170473 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 23:21:49 +00:00
Shuxin Yang
1a3150098c rdar://12801297
InstCombine for unsafe floating-point add/sub.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170471 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 23:10:12 +00:00
Nadav Rotem
62570c2813 Enable the loop vectorizer in clang and not in the pass manager, so that we can disable it in clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170470 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 23:09:44 +00:00
Jakob Stoklund Olesen
582abddeee Verify bundle flag consistency when setting them.
Now that the bundle flag aware APIs are all in place, it is possible to
continuously verify the flag consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170465 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 23:00:28 +00:00
Jakub Staszak
270bfbd3d1 Reverse order of checking SSE level when calculating compare cost, so we check
AVX2 before AVX.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170464 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 22:57:56 +00:00
Jakob Stoklund Olesen
9466bdebb7 Verify bundle flags for consistency in MachineVerifier.
The new bidirectional bundle flags are redundant, so inadvertent bundle
tearing can be detected in the machine code verifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170463 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 22:55:07 +00:00
Quentin Colombet
b519351b87 Disable ARM partial flag dependency optimization at -Oz
To not over constrain the scheduler for ARM in thumb mode, some optimizations  for code size reduction, specific to ARM thumb, are blocked when they add a dependency (like write after read dependency).

Disables this check when code size is the priority, i.e., code is compiled with -Oz.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170462 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 22:47:16 +00:00
Jakob Stoklund Olesen
bd7b36e780 Don't allow the automatically updated MI flags to be set directly.
The bundle-related MI flags need to be kept in sync with the neighboring
instructions. Don't allow the bulk flag-setting setFlags() function to
change them.

Also don't copy MI flags when cloning an instruction. The clone's bundle
flags will be set when it is explicitly inserted into a bundle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 21:36:05 +00:00
Jakob Stoklund Olesen
9b04104a5e Tighten up the splice() API for bundled instructions.
Remove the instr_iterator versions of the splice() functions. It doesn't
seem useful to be able to splice sequences of instructions that don't
consist of full bundles.

The normal splice functions that take MBB::iterator arguments are not
changed, and they can move whole bundles around without any problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170456 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 20:59:41 +00:00
Andrew Trick
04f52e1300 MISched: add dependence to ExitSU to model live-out latency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170454 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 20:53:01 +00:00
Andrew Trick
e3eddaec4a MISched: Cleanup, redundant statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170453 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 20:52:58 +00:00
Andrew Trick
44fd0bcc40 MISched: Heuristics, compare latency more precisely. It matters more for some targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170452 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 20:52:56 +00:00
Andrew Trick
9c676c2941 MISched: Remove SchedRemainder::IsResourceLimited. I don't know how to compute it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170451 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 20:52:54 +00:00
Andrew Trick
d453960f92 MISched: cleanup, use the proper iterator type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170450 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 20:52:52 +00:00
Andrew Trick
071966f6bf MISched: minor improvement, initialize remaining resources before the first scheduling decision.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170449 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 20:52:49 +00:00
Jakob Stoklund Olesen
7f1d6d688f Add an assertion for a likely ilist::splice() contract violation.
The single-element ilist::splice() function supports a noop move:

  List.splice(I, List, I);

The corresponding std::list function doesn't allow that, so add a unit
test to document that behavior.

This also means that

  List.splice(I, List, F);

is somewhat surprisingly not equivalent to

  List.splice(I, List, F, next(F));

This patch adds an assertion to catch the illegal case I == F above.
Alternatively, we could make I == F a legal noop, but that would make
ilist differ even more from std::list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170443 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 19:28:37 +00:00
Benjamin Kramer
0ef0e2e6d0 LoopVectorize: Emit reductions as log2(vectorsize) shuffles + vector ops instead of scalar operations.
For example on x86 with SSE4.2 a <8 x i8> add reduction becomes
	movdqa	%xmm0, %xmm1
	movhlps	%xmm1, %xmm1            ## xmm1 = xmm1[1,1]
	paddw	%xmm0, %xmm1
	pshufd	$1, %xmm1, %xmm0        ## xmm0 = xmm1[1,0,0,0]
	paddw	%xmm1, %xmm0
	phaddw	%xmm0, %xmm0
	pextrb	$0, %xmm0, %edx

instead of
	pextrb	$2, %xmm0, %esi
	pextrb	$0, %xmm0, %edx
	addb	%sil, %dl
	pextrb	$4, %xmm0, %esi
	addb	%dl, %sil
	pextrb	$6, %xmm0, %edx
	addb	%sil, %dl
	pextrb	$8, %xmm0, %esi
	addb	%dl, %sil
	pextrb	$10, %xmm0, %edi
	pextrb	$14, %xmm0, %edx
	addb	%sil, %dil
	pextrb	$12, %xmm0, %esi
	addb	%dil, %sil
	addb	%sil, %dl

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170439 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 18:40:20 +00:00
Eli Bendersky
968b667e27 Get rid of the pesky -Woverloaded-virtual warning. No change in functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170438 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 18:21:29 +00:00
Jakob Stoklund Olesen
edc3503ca5 Tighten the insert() API for bundled instructions.
The normal insert() function takes an MBB::iterator position, and
inserts a stand-alone MachineInstr as before.

The insert() function that takes an MBB::instr_iterator position can
insert instructions inside a bundle, and will now update the bundle
flags correctly when that happens.

When the insert position is between two bundles, it is unclear whether
the instruction should be appended to the previous bundle, prepended to
the next bundle, or stand on its own. The MBB::insert() function doesn't
bundle the instruction in that case, use the MIBundleBuilder class for
that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170437 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 17:54:53 +00:00
Hal Finkel
ca2dd36c39 Check multiple register classes for inline asm tied registers
A register can be associated with several distinct register classes.
For example, on PPC, the floating point registers are each associated with
both F4RC (which holds f32) and F8RC (which holds f64). As a result, this code
would fail when provided with a floating point register and an f64 operand
because it would happen to find the register in the F4RC class first and
return that. From the F4RC class, SDAG would extract f32 as the register
type and then assert because of the invalid implied conversion between
the f64 value and the f32 register.

Instead, search all register classes. If a register class containing the
the requested register has the requested type, then return that register
class. Otherwise, as before, return the first register class found that
contains the requested register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170436 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 17:50:58 +00:00
Nadav Rotem
04b116e08e Enable the loop vectorizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170416 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 06:37:12 +00:00
Nadav Rotem
aaf3b420b7 Rename the test so that we can add additional vectors-of-pointers tests
into the same file in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 05:50:54 +00:00
Nadav Rotem
e21708e4aa SROA: Replace calls to getScalarSizeInBits to DataLayout's API because
getScalarSizeInBits could not handle vectors of pointers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170412 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 05:23:31 +00:00
NAKAMURA Takumi
f8cd4df304 llvm/test/MC/ELF/comp-dir.s: Appease MSYS Bash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170410 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 05:08:12 +00:00
Rafael Espindola
f209dea96a Initialize NoRedZone and remove unused default values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170404 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 03:35:05 +00:00
Eli Bendersky
745bf82eba Cleanup comment and formatting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170398 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-18 00:53:36 +00:00