Commit Graph

6741 Commits

Author SHA1 Message Date
Simon Pilgrim 5769b61791 [X86][SSE2] Fix zero/any extension shuffles that don't start from the first element
Fix for D12561 - we weren't correctly ensuring that the base element for extension was moved to start on a boundary suitable for UNPCKL/H

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248536 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-24 21:02:17 +00:00
Mohammad Shahid b27b740dbf Regression Test: Deletes redundant/invalid test.
Removes absdiff_expand.ll regression test file which is invalid.

Diffrential Revision: http://reviews.llvm.org/D11678

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248493 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-24 14:37:25 +00:00
Mohammad Shahid f586decae1 Codegen: Fix llvm.*absdiff semantic.
Fixes the overflow case of llvm.*absdiff intrinsic also updats the tests and LangRef.rst accordingly.

Differential Revision: http://reviews.llvm.org/D11678

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248483 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-24 10:35:03 +00:00
Matt Arsenault fc091f40c9 Use new TokenFactor chain when merging stores
If the stores are storing values from loads which partially
alias the stores, we could end up placing the merged loads
and stores on the same chain which has the potential to break.
Each store may have a different chain dependency on only some
of the original loads. Create a new TokenFactor to capture all
of the required dependencies of the stores rather than assuming
all stores can use the same chain.

The testcase is a situation where this happens, although
it does not have an observable change from this. The DAG nodes
just happened to not be reordered before despite this missing
chain dependency.

This is based on an off-list report for an out of tree target
which regressed due to r246307 and I haven't managed to find a case
where the nodes do end up reordered with an in tree target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248468 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-24 07:22:38 +00:00
Sanjay Patel ffafbd3b2a [x86] replace integer 'xor' ops with packed SSE FP 'xor' ops when operating on FP scalars
Turn this:

movd %xmm0, %eax
movd %xmm1, %ecx
xorl %eax, %ecx
movd %ecx, %xmm0

into this:

xorps %xmm1, %xmm0

This is related to, but does not solve:
https://llvm.org/bugs/show_bug.cgi?id=22428

This is an extension of:
http://reviews.llvm.org/rL248395


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248415 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-23 18:33:42 +00:00
Sanjay Patel dfa2ab03d4 [x86] replace integer 'or' ops with packed SSE FP 'or' ops when operating on FP scalars
Turn this:

movd %xmm0, %eax
movd %xmm1, %ecx
orl %eax, %ecx
movd %ecx, %xmm0

into this:

orps %xmm1, %xmm0

This is related to, but does not solve:
https://llvm.org/bugs/show_bug.cgi?id=22428

This is an extension of:
http://reviews.llvm.org/rL248395



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248409 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-23 18:19:07 +00:00
Sanjay Patel 1813647111 [x86] replace integer 'and' ops with packed SSE FP 'and' ops when operating on FP scalars
Turn this:
   movd %xmm0, %eax
   movd %xmm1, %ecx
   andl %eax, %ecx
   movd %ecx, %xmm0

into this:
   andps %xmm1, %xmm0


This is related to, but does not solve:
https://llvm.org/bugs/show_bug.cgi?id=22428

Differential Revision: http://reviews.llvm.org/D13065



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248395 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-23 17:00:06 +00:00
Simon Pilgrim e0a23dddf0 [X86][SSE] Replace 128-bit SSE41 PMOVSX intrinsics with native IR
This patches removes the x86.sse41.pmovsx* intrinsics, provides a suitable upgrade path and updates relevant tests to sign extend a subvector instead.

LLVM counterpart to D12835

Differential Revision: http://reviews.llvm.org/D13002

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248368 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-23 08:48:33 +00:00
Cong Hou 8641a304d1 Add a test case for the fix of profile update issue when lowering switch statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248356 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-23 00:34:56 +00:00
Stephen Canon eb1a6c5669 Don't raise inexact when lowering ceil, floor, round, trunc.
The C standard has historically not specified whether or not these functions should raise the inexact flag. Traditionally on Darwin, these functions *did* raise inexact, and the llvm lowerings followed that conventions. n1778 (C bindings for IEEE-754 (2008)) clarifies that these functions should not set inexact. This patch brings the lowerings for arm64 and x86 in line with the newly specified behavior.  This also lets us fold some logic into TD patterns, which is nice.

Differential Revision: http://reviews.llvm.org/D12969


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248266 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-22 11:43:17 +00:00
Simon Pilgrim de8d7c41ca [X86][SSE] Match zero/any extension shuffles that don't start from the first element
This patch generalizes the lowering of shuffles as zero extensions to allow extensions that don't start from the first element. It now recognises extensions starting anywhere in the lower 128-bits or at the start of any higher 128-bit lane.

The motivation was to reduce the number of high cost pshufb calls, but it also improves the SSE2 case as well.

Differential Revision: http://reviews.llvm.org/D12561


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248250 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-22 08:16:08 +00:00
Simon Pilgrim 41fc6f18d7 [DAGCombiner] Improve FMA support for interpolation patterns
This patch adds support for combining patterns such as (FMUL(FADD(1.0, x), y)) and (FMUL(FSUB(x, 1.0), y)) to their FMA equivalents.

This is useful in particular for linear interpolation cases such as (FADD(FMUL(x, t), FMUL(y, FSUB(1.0, t))))

Differential Revision: http://reviews.llvm.org/D13003


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248210 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-21 20:32:48 +00:00
Matt Arsenault 3f80d148b1 DAGCombiner: Replace store of FP constant after attemping store merges
If storing multiple FP constants, some subset of the stores
would be replaced with integers due to visit order, so
MergeConsecutiveStores would only partially merge
these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248169 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-21 15:59:46 +00:00
Sanjay Patel aa5c0021e3 add test file ahead of any functional changes for PR22428
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248123 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-20 15:58:00 +00:00
Simon Pilgrim bf48d8543a [X86][SSE] Intrinsics builtins test refresh. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248122 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-20 15:41:35 +00:00
Igor Breger b0eb8fb69c AVX512: Implemented encoding and intrinsics for vcmpss/sd.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D12593

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248121 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-20 15:15:10 +00:00
Asaf Badouh fe11ff1d50 [X86][AVX512] extend support in Scalar conversion
add scalar FP to Int conversion with truncation intrinsics
add scalar conversion FP32 from/to FP64 intrinsics
add rounding mode and SAE mode encoding for these intrinsics

Differential Revision: http://reviews.llvm.org/D12665

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248117 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-20 14:31:19 +00:00
Igor Breger 0d48c46954 AVX512: vsqrtss/sd encoding and intrinsics implementation.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D12102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248116 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-20 09:13:41 +00:00
Asaf Badouh d3db2cf572 [X86][AVX512DQ] Add fpclass instruction
Differential Revision: http://reviews.llvm.org/D12931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-20 08:46:07 +00:00
Michael Kuperstein 5610c28853 [X86] Fix sitofp and uitofp instruction matching failures with long double and avx512
The operation action for i32 and i64 cannot be set to legal, as long double 
needs custom lowering.

Patch by: mitch.l.bodart@intel.com
Differential Revision: http://reviews.llvm.org/D12372


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248114 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-20 08:12:17 +00:00
Igor Breger d425988995 AVX512: Implemented intrinsics for vshuff32x4, vshuff64x2, vshufi64x2, vshufi32x4
Added tests for intrinsics.

Differential Revision: http://reviews.llvm.org/D12525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248113 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-20 07:18:53 +00:00
Igor Breger 28cce2ad25 AVX512: Implement instructions encoding, lowering and intrinsics
vinserti64x4, vinserti64x2, vinserti32x8, vinserti32x4, vinsertf64x4, vinsertf64x2, vinsertf32x8, vinsertf32x4
Added tests for encoding, lowering and intrinsics.

Differential Revision: http://reviews.llvm.org/D11893

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248111 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-20 06:52:42 +00:00
Simon Pilgrim 0e92420490 [X86][AVX2] Use general sext IR for vpmovsx stack folding tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248093 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-19 17:04:18 +00:00
Simon Pilgrim afa71f40bf [X86][SSE] Vectorize CTTZ + CTTZ_ZERO_UNDEF
Now that we have fast vector CTPOP implementations we can use this to speed up vector CTTZ using the pattern (cttz(x) = ctpop((x & -x) - 1))

Additionally, for AVX512CD that provides lzcnt instructions we can use the pattern (cttz_undef(x) = (width - 1) - ctlz(x & -x))

Differential Revision: http://reviews.llvm.org/D12663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248091 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-19 13:22:57 +00:00
Quentin Colombet d68bf2b419 [ShrinkWrap] Refactor the handling of infinite loop in the analysis.
- Strenghten the logic to be sure we hoist the restore point out of the current
  loop. (The fixes a bug with infinite loop, added as part of the patch.)
- Walk over the exit blocks of the current loop to conver to the desired restore
  point in one iteration of the update loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247958 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 23:21:34 +00:00
David Majnemer 618b2eda98 [WinEH] Fix tests broken by funclet-layout
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247944 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 21:11:12 +00:00
David Majnemer 048d7e541d [WinEH] Add a funclet layout pass
Windows EH funclets need to be contiguous.  The FuncletLayout pass will
ensure that the funclets are together and begin with a funclet entry MBB.

Differential Revision: http://reviews.llvm.org/D12943

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247937 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:45:18 +00:00
Reid Kleckner f946dd0412 [WinEH] Make funclet return instrs pseudo instrs
This makes catchret look more like a branch, and less like a weird use
of BlockAddress. It also lets us get away from
llvm.x86.seh.restoreframe, which relies on the old parentfpoffset label
arithmetic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247936 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 20:43:47 +00:00
Reid Kleckner afc364cf3b Fix the test case I just committed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247905 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 17:21:45 +00:00
Reid Kleckner 7ad3e0e009 [WinEH] Add and use hasEHPadSuccessor instead of getLandingPadSuccessor
getLandingPadSuccessor assumes that each invoke can have at most one EH
pad successor, but WinEH invokes can have more than one. Two out of
three callers of getLandingPadSuccessor don't use the returned
landingpad, so we can make them use this simple predicate instead.

Eventually we'll have to circle back and fix SplitKit.cpp so that
register allocation works. Baby steps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247904 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 17:19:40 +00:00
Elena Demikhovsky 2e5bf5535c AVX-512: shufflevector for i1 vectors <2 x i1> .. <64 x i1>
AVX-512 does not provide an instruction that shuffles mask register. So I do the following way:

mask-2-simd , shuffle simd , simd-2-mask

Differential Revision: http://reviews.llvm.org/D12727



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247876 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-17 06:53:12 +00:00
Reid Kleckner 436444d569 [WinEH] Rip out the landingpad-based C++ EH state numbering code
It never really worked, and the new code is working better every day.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247860 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 22:14:46 +00:00
Reid Kleckner 66ef931b43 [WinEH] Pull Adjectives and CatchObj out of the catchpad arg list
Clang now passes the adjectives as an argument to catchpad.

Getting the CatchObj working is simply a matter of threading another
static alloca through codegen, first as an alloca, then as a frame
index, and finally as a frame offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247844 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 20:16:27 +00:00
Sanjay Patel 39490133e4 propagate fast-math-flags on DAG nodes
After D10403, we had FMF in the DAG but disabled by default. Nick reported no crashing errors after some stress testing, 
so I enabled them at r243687. However, Escha soon notified us of a bug not covered by any in-tree regression tests: 
if we don't propagate the flags, we may fail to CSE DAG nodes because differing FMF causes them to not match. There is
one test case in this patch to prove that point.

This patch hopes to fix or leave a 'TODO' for all of the in-tree places where we create nodes that are FMF-capable. I 
did this by putting an assert in SelectionDAG.getNode() to find any FMF-capable node that was being created without FMF
( D11807 ). I then ran all regression tests and test-suite and confirmed that everything passes.

This patch exposes remaining work to get DAG FMF to be fully functional: (1) add the flags to non-binary nodes such as
FCMP, FMA and FNEG; (2) add the flags to intrinsics; (3) use the flags as conditions for transforms rather than the
current global settings.

Differential Revision: http://reviews.llvm.org/D12095



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247815 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 16:31:21 +00:00
Michael Kuperstein 196a1036c4 [X86] Do not generate 64-bit pops of 32-bit GPRs.
When trying emit a stack adjustments using pops, frame lowering selects an
arbitrary free GPR. It should always select one from an appropriate class...
This fixes PR24649.

Patch by: amjad.aboud@intel.com
Differential Revision: http://reviews.llvm.org/D12609


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247785 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 11:27:20 +00:00
Mehdi Amini 793a2b15e7 Make the default triple optional by allowing an empty string
When building LLVM as a (potentially dynamic) library that can be linked against
by multiple compilers, the default triple is not really meaningful.
We allow to explicitely set it to an empty string when configuring LLVM.
In this case, said "target independent" tests in the test suite that are using
the default triple are disabled by matching the newly available feature
"default_triple".

Reviewers: probinson, echristo
Differential Revision: http://reviews.llvm.org/D12660

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247775 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-16 05:34:32 +00:00
Quentin Colombet bd22a1dc62 [ShrinkWrapping] Add a test case for r247710.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247713 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-15 18:51:43 +00:00
Simon Pilgrim 29f50e9783 [X86][MMX] Added shuffle decodes for MMX/3DNow! shuffles.
Added shuffle decodes for MMX PUNPCK + PSHUFW shuffles.
Added shuffle decodes for 3DNow! PSWAPD shuffles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247526 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-13 11:28:45 +00:00
Elena Demikhovsky b21635658f AVX-512: Fixed a bug in OR/XOR operations for 512-bit FP values on KNL.
KNL does not have VXORPS, VORPS for 512-bit values.
I use integer VPXOR, VPOR that actually do the same.

X86ISD::FXOR/FOR are generated as a result of FSUB combining.

Differential Revision: http://reviews.llvm.org/D12753



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247523 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-13 08:15:15 +00:00
Sanjay Patel d8fd22b7ec [x86] enable machine combiner reassociations for 128-bit vector logical integer insts (2nd try)
The changes in:
test/CodeGen/X86/machine-cp.ll
are just due to scheduling differences after some logic instructions were reassociated.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247516 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-12 19:47:50 +00:00
Simon Pilgrim 1b1bacb118 [X86] Added i1 vector sextload tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247509 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-12 15:36:41 +00:00
Simon Pilgrim 21e0b1f45b [X86][FMA] Refreshed fma tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247508 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-12 15:33:05 +00:00
Sanjay Patel 69f08e598c revert r247506; need to verify changes in existing tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247507 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-12 15:27:31 +00:00
Sanjay Patel e6c453bf2d [x86] enable machine combiner reassociations for 128-bit vector logical integer insts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247506 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-12 14:58:04 +00:00
Simon Pilgrim 9029773cee [X86][SSE] Use general sext IR for (v)pmovsx stack folding tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247502 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-12 11:45:24 +00:00
Akira Hatanaka 8e2b613ef0 Use function attribute "stackrealign" to decide whether stack
realignment should be forced.

With this commit, we can now force stack realignment when doing LTO and
do so on a per-function basis. Also, add a new cl::opt option
"stackrealign" to CommandFlags.h which is used to force stack
realignment via llc's command line.

Out-of-tree projects currently using -force-align-stack to force stack
realignment should make changes to attach the attribute to the functions
in the IR.

Differential Revision: http://reviews.llvm.org/D11814


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247450 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-11 18:54:38 +00:00
David Majnemer 4c53124330 [X86] Make sure startproc/endproc are paired
We used different conditions to determine if we should emit startproc vs
endproc.  Use the same condition to ensure that they will always be
paired.

This fixes PR24374.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247435 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-11 17:34:34 +00:00
David Blaikie 21f77df7b6 [opaque pointer type] Add textual IR support for explicit type parameter for global aliases
update.py:
import fileinput
import sys
import re

alias_match_prefix = r"(.*(?:=|:|^)\s*(?:external |)(?:(?:private|internal|linkonce|linkonce_odr|weak|weak_odr|common|appending|extern_weak|available_externally) )?(?:default |hidden |protected )?(?:dllimport |dllexport )?(?:unnamed_addr |)(?:thread_local(?:\([a-z]*\))? )?alias"
plain = re.compile(alias_match_prefix + r" (.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|addrspacecast|\[\[[a-zA-Z]|\{\{).*$)")
cast  = re.compile(alias_match_prefix + r") ((?:bitcast|inttoptr|addrspacecast)\s*\(.* to (.*?)(| addrspace\(\d+\) *)\*\)\s*(?:;.*)?$)")
gep   = re.compile(alias_match_prefix + r") ((?:getelementptr)\s*(?:inbounds)?\s*\((?P<type>.*), (?P=type)(?:\s*addrspace\(\d+\)\s*)?\* .*\)\s*(?:;.*)?$)")

def conv(line):
  m = re.match(cast, line)
  if m:
    return m.group(1) + " " + m.group(3) + ", " + m.group(2)
  m = re.match(gep, line)
  if m:
    return m.group(1) + " " + m.group(3) + ", " + m.group(2)
  m = re.match(plain, line)
  if m:
    return m.group(1) + ", " + m.group(2) + m.group(3) + "*" + m.group(4) + "\n"
  return line

for line in sys.stdin:
  sys.stdout.write(conv(line))

apply.sh:
for name in "$@"
do
  python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
  rm -f "$name.tmp"
done

The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247378 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-11 03:22:04 +00:00
Reid Kleckner 3f3f976995 [WinEH] Push and pop EBP for 32-bit funclets
The Win32 EH runtime caller does not preserve EBP, even though it does
preserve the CSRs (EBX, ESI, EDI) for us. The result was that each
finally funclet call would leave the frame pointer off by 12 bytes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247348 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-10 22:00:02 +00:00
Reid Kleckner 76b827089d Fix SEH state numbering algorithm to handle cleanupendpads
WinEHPrepare's new coloring algorithm really expects to see
cleanupendpads now, so Clang will start emitting them soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247341 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-10 21:46:36 +00:00