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6187 Commits

Author SHA1 Message Date
Rafael Espindola
58421d7d08 initial implementation of ARMRegisterInfo::eliminateFrameIndex 
fixes test/Regression/CodeGen/ARM/ret_arg5.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-18 00:08:07 +00:00
Evan Cheng
357edf8a4f A new entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28848 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-17 00:45:49 +00:00
Chris Lattner
b1d26f6665 Implement the getPointerRegClass method, which is required for the ptr_rc 
magic to work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28847 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-17 00:01:04 +00:00
Evan Cheng
54edc84000 Later models likely to have Yonah like attributes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28843 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:58:49 +00:00
Chris Lattner
a24b7618f8 Upgrade some load/store instructions to use the proper addressing mode stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28841 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:29:41 +00:00
Chris Lattner
66d7ebb777 In 64-bit mode, addr mode operands use G8RC instead of GPRC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28840 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:29:03 +00:00
Chris Lattner
059ca0f5b7 fix some assumptions that pointers can only be 32-bits. With this, we can 
now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28839 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:01:35 +00:00
Chris Lattner
956f43c310 Split 64-bit instructions out into a separate .td file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28838 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 20:22:01 +00:00
Chris Lattner
8fa05dac39 Force 64-bit register availability in 64-bit mode. For real. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 20:05:06 +00:00
Chris Lattner
af89fa609b Remove the -darwin and -aix llc options, inferring darwinism and aixism from 
the target triple & subtarget info.  woo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:50:48 +00:00
Chris Lattner
1790d44d0d Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:22:52 +00:00
Chris Lattner
acbc07aa22 Remove ctor with each piece specifyable (which causes overload ambiguities), 
add a new init method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28828 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:11:26 +00:00
Chris Lattner
7c1fb5f08c Document the subtarget features better, make sure that 64-bit mode, 64-bit 
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 17:50:12 +00:00
Chris Lattner
a7a5854f1c Rename some subtarget features. A CPU now can *have* 64-bit instructions, 
can in 32-bit mode we can choose to optionally *use* 64-bit registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 17:34:12 +00:00
Chris Lattner
94de9a8951 First baby step towards ppc64 support. This adds a new -march=ppc64 backend 
that is currently just like ppc32 :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28813 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 01:37:27 +00:00
Chris Lattner
8e173de059 Add a note that Nate noticed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28808 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 21:33:31 +00:00
Jim Laskey
f8a01a9661 1. Support standard dwarf format (was bootstrapping in Apple format.) 
2. Add vector support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28807 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 20:51:43 +00:00
Evan Cheng
31f7be9fb7 Vector extract / insert index operand should have ptr type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28798 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:19:05 +00:00
Evan Cheng
a7dc4a59cb Type of extract_element index operand should be iPTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28797 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:18:06 +00:00
Evan Cheng
015188ffbc Type of vector extract / insert index operand should be iPTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28796 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:14:54 +00:00
Evan Cheng
fae2994302 X86 call instructions can take variable number of operands. Parameters of 
vector types are passed via XMM registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28789 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 22:24:55 +00:00
Chris Lattner
4b5a352f25 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28787 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 21:26:18 +00:00
Evan Cheng
b69d113201 Add argument registers to the end of call operand list (partial fix). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28783 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 18:17:40 +00:00
Jim Laskey
014f98c7e5 Place dwarf headers at earliest possible point. Well behaved when skipping 
functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28781 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 11:35:03 +00:00
Andrew Lenharth
c8aba85e1c I am sure I had commited this workaround before. Perhaps soon I should sort it all out 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28772 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 20:34:47 +00:00
Andrew Lenharth
0e4dd01ffc It really helps to be returning to the correct place 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28769 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 18:27:39 +00:00
Evan Cheng
004fb92615 Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28764 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 05:14:44 +00:00
Chris Lattner
e67304fb78 Gaar! Don't use r11 for CR save/restore, use R0. R11 can be register 
allocated, thus live across the save/reload.  This fixes

llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg

and probably others, with -regalloc=local.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28761 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 23:59:16 +00:00
Chris Lattner
b47e0897a0 Fix spilling and reloading of CR regs to reload the right values. This fixes 
Olden/power (and probably others) with -regalloc=local.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28760 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 21:50:57 +00:00
Andrew Lenharth
f2b806a1aa Let the alpha breakage begin. First Formals and RET. next Calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28753 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 18:09:24 +00:00
Rafael Espindola
337c4ad6e7 lower more then 4 formal arguments. The offset is currently hard coded. 
implement SelectFrameIndex


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28751 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 12:28:08 +00:00
Chris Lattner
cf00631719 Work around a nasty tblgen bug where it doesn't add operands for varargs 
nodes correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28745 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-10 01:15:02 +00:00
Chris Lattner
4a45abf66e Fix a problem exposed by the local allocator. CALL instructions are not marked 
as using incoming argument registers, so the local allocator would clobber them
between their set and use.  To fix this, we give the call instructions a variable
number of uses in the CALL MachineInstr itself, so live variables understands
the live ranges of these register arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28744 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-10 01:14:28 +00:00
Evan Cheng
e5e228df19 Comments to appease sabre. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28737 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-09 06:25:10 +00:00
Evan Cheng
b12223e284 Minor compilation speed improvement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28736 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-09 06:24:42 +00:00
Chris Lattner
c0bad5706e Add support for "m" inline asm constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28728 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-08 18:03:49 +00:00
Evan Cheng
e8bd0a332a Added X86FunctionInfo subclass of MachineFunction to record whether the 
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28703 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 23:30:24 +00:00
Chris Lattner
475c55393a Now that PR633 is implemented, the CBE can know to emit _setjmp/_longjmp 
when available.  This speeds up hexxagon from 18.61s to 16.61s with the CBE on
PPC Mac OS (for reference, LLC is 15.48s and GCC is 23.35s).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28697 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 21:45:47 +00:00
Chris Lattner
001db453f5 Add PowerPC intrinsics to support dcbz[l] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28696 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 21:29:23 +00:00
Rafael Espindola
4b02367d54 add R0 to liveout 
expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28691 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-05 22:26:14 +00:00
Evan Cheng
c21051ff96 A few new entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28683 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-04 09:08:00 +00:00
Evan Cheng
f8614db52e Be consistent with gcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28682 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-04 07:24:07 +00:00
Andrew Lenharth
a5cc38bcbd ignore ordered/unordered for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28679 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-04 00:25:51 +00:00
Evan Cheng
3649b0efa5 Cygwin support. Patch by Anton Korobeynikov! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28672 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 22:38:37 +00:00
Evan Cheng
aede9b9598 Use xor to clear a register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28667 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 21:20:34 +00:00
Evan Cheng
94b1453278 Incorrect AT&T opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28666 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 21:09:10 +00:00
Chris Lattner
d9477607dc Add mingw support, patch contributed by Anton 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28661 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 18:54:01 +00:00
Chris Lattner
08a9a985dc Silence -pedantic warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 17:17:06 +00:00
Chris Lattner
078d1826d2 Silence -pedantic warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28630 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 17:13:10 +00:00
Evan Cheng
2675534b7f Typos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28617 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 05:53:27 +00:00
Reid Spencer
a2e05ea997 For PR786: 
Don't warn about -pedantic errors. Add a note to the PR instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28616 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 05:49:51 +00:00
Reid Spencer
72f42bbc9b For PR786: 
Turn -pedantic and -Wno-long-long compile flags on by default. In a few
places, avoid the warnings by removing these options in the local makefile.
One notable exception: lib/Target/CBackend/Writer.cpp. These warnings are
left on as a reminder to developers to clean them up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28614 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 01:55:21 +00:00
Reid Spencer
18c8b49e7d Use archive libraries instead of object files for VMCore, BCReader, 
BCWriter, and bzip2 libraries. Adjust the various makefiles to accommodate
these changes. This was done to speed up link times.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28610 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 01:30:27 +00:00
Evan Cheng
04b2562502 Remove a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28607 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 00:30:39 +00:00
Evan Cheng
cbe70e1c4b Rename ASM modifier trunc8, trunc16 to subreg8, subreg16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28606 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 22:34:26 +00:00
Reid Spencer
2bc320de0c Fix casting so there's no warning on Alpha. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28605 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 22:26:11 +00:00
Evan Cheng
f91c10153c Sign extender 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28603 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 22:05:11 +00:00
Evan Cheng
190717d3cf Rename instructions for consistency sake. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28594 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 19:00:07 +00:00
Evan Cheng
9d09b89f39 Select vector_shuffle v1, undef <2, 3, ?, ?> to MOVHLPS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28582 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 00:51:37 +00:00
Evan Cheng
8f692e2457 Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28581 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 00:50:42 +00:00
Evan Cheng
5a47282149 A new entry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28579 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 23:56:31 +00:00
Evan Cheng
b5e406afc3 MAXP{D|S} and MINP{D|S} are commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28578 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 23:47:30 +00:00
Evan Cheng
efeaed8fb4 Commute shufps / shufpd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28577 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 23:34:30 +00:00
Evan Cheng
a0eaf2d0c5 Somehow I lost a condition when I was shuffling some code around. Anyway, 
only transform a shufps to pshufd when the first two operands are the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28575 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 22:13:36 +00:00
Evan Cheng
aa3c1410b4 Fix a build breaker. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28574 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:45:53 +00:00
Evan Cheng
51da42c28f Oops. PSHUFD is only available with SSE2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28573 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:30:59 +00:00
Chris Lattner
9e18ef5262 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28572 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:29:15 +00:00
Chris Lattner
7b05350906 Always reserve space for 8 spilled GPRs. GCC apparently assumes that this 
space will be available, even if the callee isn't varargs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28571 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:21:04 +00:00
Evan Cheng
ccba76bb25 Allow shufps x, x, mask to be converted to pshufd x, mask to save a move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28565 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 20:26:50 +00:00
Evan Cheng
eaf1e31775 Remove bogus comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28564 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 20:24:48 +00:00
Rafael Espindola
85ede37ca9 Expand ret into "CopyToReg;BRIND" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28559 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 17:33:19 +00:00
Evan Cheng
5a622f2e06 Add a note about integer multiplication by constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28551 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 07:37:37 +00:00
Evan Cheng
e6ad27e917 A addressing mode folding enhancement: 
Fold c2 in (x << c1) | c2 where (c2 < c1)
e.g.
int test(int x) {
  return (x << 3) + 7;
}

This can be codegen'd as:
leal 7(,%eax,8), %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28550 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 06:59:36 +00:00
Evan Cheng
8c65fa564a Some new entries about truncate / anyext 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28548 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 06:23:50 +00:00
Chris Lattner
a5135ba0c9 Ignore generated files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28520 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-27 01:23:30 +00:00
Evan Cheng
6848be1a27 Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 23:10:12 +00:00
Evan Cheng
3fddf241d8 Vector argument must be passed in memory location aligned on 16-byte boundary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28505 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 20:37:47 +00:00
Evan Cheng
1d6a9b3b6c Mac OS X ABI document lied. The first four XMM registers are used to pass 
vector arguments, not three.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28504 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 19:22:06 +00:00
Evan Cheng
052fb5110f Minor update to make the code more clear 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28499 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:39:59 +00:00
Evan Cheng
f9d62dc6e5 Update more comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28498 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:37:16 +00:00
Evan Cheng
f9ff7c54be Fix some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28497 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:25:43 +00:00
Evan Cheng
6f707999a1 No need to handle illegal types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28496 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:22:49 +00:00
Rafael Espindola
a1334cdfb2 On ARM, alignment is in bits 
Add lr as a hard coded operand of bx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28494 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 10:56:17 +00:00
Evan Cheng
138a24e4d4 Remove a couple of bogus casts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28493 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 08:04:31 +00:00
Evan Cheng
57c0788e02 Minor bug caught by Ashwin Chandra 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28491 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 06:22:34 +00:00
Evan Cheng
cc1fc220a0 Consistency 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28488 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 23:31:23 +00:00
Evan Cheng
25e71d10a0 Some clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28483 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 22:38:31 +00:00
Chris Lattner
8b5fbc5cd4 Add support for the missing FP condition codes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28482 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 22:26:02 +00:00
Evan Cheng
a9bb445db0 Remove some dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28481 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 22:25:52 +00:00
Evan Cheng
932ad51fea X86 / Cygwin asm / alignment fixes. 
Patch contributed by Anton Korobeynikov!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28480 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 21:59:08 +00:00
Evan Cheng
6b5783d0b1 Build breakage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28475 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 18:56:34 +00:00
Chris Lattner
8e2a04e21d Fix build failure of povray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28473 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 18:06:16 +00:00
Chris Lattner
5d634ce466 Fix Benchmarks/MallocBench/cfrac 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28471 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 16:54:16 +00:00
Rafael Espindola
2f99b6bd96 implement initial version of ARMAsmPrinter::printOperand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28470 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 12:57:06 +00:00
Rafael Espindola
c3c1a86aa0 port the ARM backend to use ISD::CALL instead of LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28469 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 11:00:18 +00:00
Evan Cheng
32fe1035a7 Switch X86 over to a call-selection model where the lowering code creates 
the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28463 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:59:30 +00:00
Evan Cheng
4360bdcf1f CALL node change (arg / sign pairs instead of just arguments). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28462 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:57:32 +00:00
Evan Cheng
6a3d5a62f0 Assert if InflightSet is not cleared after instruction selecting a BB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28459 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:24:28 +00:00
Evan Cheng
afe358e7d4 Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 20:46:25 +00:00
Reid Spencer
19b7e0e0ca For PR786: 
Minor tweaks in public headers and a few .cpp files so that LLVM can build
successfully with -pedantic and projects using LLVM with -pedantic don't
get warnings from LLVM. There's still more -pedantic warnings to fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28453 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 19:21:13 +00:00