Commit Graph

24674 Commits

Author SHA1 Message Date
Wolfgang Pieb 94f396c4e1 [DWARF][NFC] Refactor range list emission to use a static helper
This is prep for DWARF v5 range list emission. Emission of a single range list is moved
to a static helper function.

Reviewer: jdevlieghere

Differential Revision: https://reviews.llvm.org/D49098


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336621 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-10 00:10:11 +00:00
Mark Searles 88b9c13528 RenameIndependentSubregs: Fix handling of undef tied operands
Ensure that, if updating a tied operand pair, to only update
that pair.

Differential Revision: https://reviews.llvm.org/D49052

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336593 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-09 20:07:03 +00:00
Daniel Sanders d700c295ab [globalisel][irtranslator] Add support for atomicrmw and (strong) cmpxchg
Summary:
This patch adds support for the atomicrmw instructions and the strong
cmpxchg instruction to the IRTranslator.

I've left out weak cmpxchg because LangRef.rst isn't entirely clear on what
difference it makes to the backend. As far as I can tell from the code, it
only matters to AtomicExpandPass which is run at the LLVM-IR level.

Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar, volkan, javed.absar

Reviewed By: qcolombet

Subscribers: kristof.beyls, javed.absar, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D40092

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336589 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-09 19:33:40 +00:00
Roman Lebedev 9e386ad60d [X86][TLI] DAGCombine: Unfold variable bit-clearing mask to two shifts.
Summary:
This adds a reverse transform for the instcombine canonicalizations
that were added in D47980, D47981.

As discussed later, that was worse at least for the code size,
and potentially for the performance, too.

https://rise4fun.com/Alive/Zmpl

Reviewers: craig.topper, RKSimon, spatel

Reviewed By: spatel

Subscribers: reames, llvm-commits

Differential Revision: https://reviews.llvm.org/D48768

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336585 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-09 19:06:42 +00:00
Craig Topper f2fd9eaa8e [SelectionDAG] Add VT consistency checks to the creation of ISD::FMA.
This is similar to what is done for binops. I don't know if this would have helped us catch the bug fixed in r336566 earlier or not, but I figured it couldn't hurt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336576 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-09 18:23:55 +00:00
Jonas Devlieghere f8d4a3aecf [AccelTable] Provide abstraction for emitting DWARF5 accelerator tables.
When emitting the DWARF accelerator tables from dsymutil, we don't have
a DwarfDebug instance and we use a custom class to represent Dwarf
compile units. This patch adds an interface AccelTableWriterInfo to
abstract these from the Dwarf5AccelTableWriter, so we can have a custom
implementation for this in dsymutil.

Differential revision: https://reviews.llvm.org/D49031

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336529 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-09 09:08:44 +00:00
Jonas Devlieghere ceac96362f [AccelTable] Dwarf5AccelTableEmitter -> Writer (NFC)
Renames Dwarf5AccelTableEmitter to Dwarf5AccelTableWriter as suggested
in D49031.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336525 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-09 08:47:38 +00:00
Simon Pilgrim 074b7c3a09 [SelectionDAG] Split float and integer isKnownNeverZero tests
Splits off isKnownNeverZeroFloat to handle +/- 0 float cases.

This will make it easier to be more aggressive with the integer isKnownNeverZero tests (similar to ValueTracking), use computeKnownBits etc.

Differential Revision: https://reviews.llvm.org/D48969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336492 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-07 18:17:14 +00:00
Simon Pilgrim b58cfae435 Use const APInt& to avoid extra copy. NFCI.
As discussed on D48825.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336491 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-07 17:33:48 +00:00
Simon Pilgrim 7671355ab9 [DAGCombiner] Add EXTRACT_SUBVECTOR to SimplifyDemandedVectorElts
As discussed on PR37989, this patch adds EXTRACT_SUBVECTOR handling to TargetLowering::SimplifyDemandedVectorElts and calls it from DAGCombiner::visitEXTRACT_SUBVECTOR.

Differential Revision: https://reviews.llvm.org/D48825

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336490 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-07 17:30:06 +00:00
Vedant Kumar c2801b1640 Use Type::isIntOrPtrTy where possible, NFC
It's a bit neater to write T.isIntOrPtrTy() over `T.isIntegerTy() ||
T.isPointerTy()`.

I used Python's re.sub with this regex to update users:

  r'([\w.\->()]+)isIntegerTy\(\)\s*\|\|\s*\1isPointerTy\(\)'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336462 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-06 20:17:42 +00:00
Nico Weber 5b4b9a07e8 Revert 336426 (and follow-ups 428, 440), it very likely caused PR38084.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336453 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-06 17:37:24 +00:00
Vedant Kumar 0f83e1fc48 [Local] replaceAllDbgUsesWith: Update debug values before RAUW
The replaceAllDbgUsesWith utility helps passes preserve debug info when
replacing one value with another.

This improves upon the existing insertReplacementDbgValues API by:

- Updating debug intrinsics in-place, while preventing use-before-def of
  the replacement value.
- Falling back to salvageDebugInfo when a replacement can't be made.
- Moving the responsibiliy for rewriting llvm.dbg.* DIExpressions into
  common utility code.

Along with the API change, this teaches replaceAllDbgUsesWith how to
create DIExpressions for three basic integer and pointer conversions:

- The no-op conversion. Applies when the values have the same width, or
  have bit-for-bit compatible pointer representations.
- Truncation. Applies when the new value is wider than the old one.
- Zero/sign extension. Applies when the new value is narrower than the
  old one.

Testing:

- check-llvm, check-clang, a stage2 `-g -O3` build of clang,
  regression/unit testing.
- This resolves a number of mis-sized dbg.value diagnostics from
  Debugify.

Differential Revision: https://reviews.llvm.org/D48676

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336451 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-06 17:32:39 +00:00
Diogo N. Sampaio 4ebe5514a9 Added missing semicolon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336428 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-06 10:09:04 +00:00
Diogo N. Sampaio eaaa4f4cfc [SelectionDAG] https://reviews.llvm.org/D48278
D48278

Allow to reduce redundant shift masks.
For example:
x1 = x & 0xAB00
x2 = (x >> 8) & 0xAB

can be reduced to:
x1 = x & 0xAB00
x2 = x1 >> 8
It only allows folding when the masks and shift values are constants.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336426 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-06 09:42:25 +00:00
Diogo N. Sampaio d4298974bd Testing commit permision
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336384 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-05 18:49:32 +00:00
Yvan Roux 195a60c5f5 [MachineOutliner] Fix typo in getOutliningCandidateInfo function name
getOutlininingCandidateInfo -> getOutliningCandidateInfo

Differential Revision: https://reviews.llvm.org/D48867

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336285 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-04 15:37:08 +00:00
Max Kazantsev 2dfeba53c3 [ImplicitNullChecks] Check for rewrite of register used in 'test' instruction
The following code pattern:

       mov %rax, %rcx
       test %rax, %rax
       %rax = ....
       je  throw_npe
       mov(%rcx), %r9
       mov(%rax), %r10

gets transformed into the following incorrect code after implicit null check pass:
        mov %rax, %rcx
       %rax = ....
       faulting_load_op("movl (%rax), %r10", throw_npe)
       mov(%rcx), %r9

For implicit null check pass, if the register that is checked for null value (ie, the register used in the 'test' instruction) is written into before the condition jump, we should avoid doing the optimization.

Patch by Surya Kumari Jangala!

Differential Revision: https://reviews.llvm.org/D48627
Reviewed By: skatkov


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336241 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-04 08:01:26 +00:00
Simon Pilgrim 6a79620306 [DAGCombiner] visitSDIV - Permit MIN_SIGNED_VALUE in pow2 vector codegen
Now that D45806 has landed, we can re-enable support for MIN_SIGNED_VALUE in the sdiv by pow2-constant code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336198 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-03 14:11:32 +00:00
David Stenberg f123cb818a [CodeGen] Make block removal order deterministic in CodeGenPrepare
Summary:
Replace use of a SmallPtrSet with a SmallSetVector to make the worklist
iteration order deterministic. This is done as the order the blocks are
removed may affect whether or not PHI nodes in successor blocks are
removed.

For example, consider the following case where %bb1 and %bb2 are
removed:

    bb1:
      br i1 undef, label %bb3, label %bb4
    bb2:
      br i1 undef, label %bb4, label %bb3
    bb3:
      pv1 = phi type [ undef, %bb1 ], [ undef, %bb2], [ v0, %other ]
      br label %bb4
    bb4:
      pv2 = phi type [ undef, %bb1 ], [ undef, %bb2 ],
                     [ pv1, %bb3 ], [ v0, %other ]

If %bb2 is removed before %bb1, the incoming values from %bb1 and %bb2
to pv1 will be removed before %bb1 is removed as a predecessor to %bb4.
The pv1 node will thus be optimized out (to v0) at the time %bb1 is
removed as a predecessor to %bb4, leaving the blocks as following when
the incoming value from %bb1 has been removed:

    bb3: ; pv1 optimized out, incoming value to pv2 is v0
      br label %bb4
    bb4:
      pv2 = phi type [ v0, %bb3 ], [ v0, %other ]

The pv2 PHI node will be optimized away by removePredecessor() as all
incoming values are identical.

In case %bb2 is removed after %bb1, pv1 will not be optimized out at the
time %bb2 is removed as a predecessor to %bb4, leaving the blocks as
following when the incoming value from %bb2 to pv2 has been removed:

    bb3:
      pv1 = phi type [ undef, %bb2 ], [ v0, %other ]
      br label %bb4
    bb4:
      pv2 = phi type [ pv1, %bb3 ], [ v0, %other ]

The pv2 PHI node will thus not be removed in this case, ultimately
leading to the following output

    bb3: ; pv1 optimized out, incoming value to pv2 is v0
      br label %bb4
    bb4:
      pv2 = phi type [ v0, %bb3 ], [ v0, %other ]

I have not looked into changing DeleteDeadBlock() so that the redundant
PHI nodes are removed.

I have not added a test case, as I was not able to create a particularly
small and (not messy) reproducer. This is likely due to SmallPtrSet
behaving deterministically when in small mode.

Reviewers: void, dexonsmith, spatel, skatkov, fhahn, bkramer, nhaehnle

Reviewed By: fhahn

Subscribers: mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D48369

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336109 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-02 14:23:48 +00:00
Piotr Padlewski c2f24d9ea8 Implement strip.invariant.group
Summary:
This patch introduce new intrinsic -
strip.invariant.group that was described in the
RFC: Devirtualization v2

Reviewers: rsmith, hfinkel, nlopes, sanjoy, amharc, kuhar

Subscribers: arsenm, nhaehnle, JDevlieghere, hiraditya, xbolva00, llvm-commits

Differential Revision: https://reviews.llvm.org/D47103

Co-authored-by: Krzysztof Pszeniczny <krzysztof.pszeniczny@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336073 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-02 04:49:30 +00:00
Simon Pilgrim 985808d7ef [DAGCombiner] Handle correctly non-splat power of 2 -1 divisor (PR37119)
The combine added in commit 329525 overlooked the case where one, but not all, of the divisor elements is -1, -1 is the only power of two value for which the sdiv expansion recipe breaks.

Thanks to @zvi for the original patch.

Differential Revision: https://reviews.llvm.org/D45806

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336048 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-30 12:22:55 +00:00
Jessica Paquette c549767db5 [MachineOutliner] Add support for target-default outlining.
This adds functionality to the outliner that allows targets to
specify certain functions that should be outlined from by default.

If a target supports default outlining, then it specifies that in
its TargetOptions. In the case that it does, and the user hasn't
specified that they *never* want to outline, the outliner will
be added to the pass pipeline and will run on those default functions.

This is a preliminary patch for turning the outliner on by default
under -Oz for AArch64.

https://reviews.llvm.org/D48776

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336040 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-30 03:56:03 +00:00
Jessica Paquette d1bf1e8336 [MachineOutliner] Add always and never options to -enable-machine-outliner
This is a recommit of r335887, which was erroneously committed earlier.

To enable the MachineOutliner by default on AArch64, we need to be able to
disable the MachineOutliner and also provide an option to "always" enable the
outliner.

This adds that capability. It allows the user to still use the old
-enable-machine-outliner option, which defaults to "always". This is building
up to allowing the user to specify "always" versus the target default
outlining behaviour.

https://reviews.llvm.org/D48682

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335986 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-29 16:12:45 +00:00
Alexey Bataev 6882f03fec [DEBUG_INFO, NVPTX] Do not emit .debug_loc section.
Summary:
.debug_loc section is not supported for NVPTX target. If there is an
object whose location can change during its lifetime, we do not generate
debug location info for this variable.

Reviewers: echristo

Subscribers: jholewinski, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D48730

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335976 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-29 14:23:28 +00:00
Jessica Paquette 519acca334 [MachineOutliner] Never add the outliner in -O0
This is a recommit of r335879.

We shouldn't add the outliner when compiling at -O0 even if
-enable-machine-outliner is passed in. This makes sure that we
don't add it in this case.

This also removes -O0 from the outliner DWARF test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335930 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 21:49:24 +00:00
Martin Storsjo d628d72dc9 [COFF] Fix constant sharing regression for MinGW
This fixes a regression since SVN r334523, where the object files
built targeting MinGW were rejected by GNU binutils tools. Prior to
that commit, we only put constants in comdat for MSVC configurations.

Differential Revision: https://reviews.llvm.org/D48567

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335918 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 20:28:29 +00:00
Jessica Paquette d6b8d8c07b [MachineOutliner] Define MachineOutliner support in TargetOptions
Targets should be able to define whether or not they support the outliner
without the outliner being added to the pass pipeline. Before this, the
outliner pass would be added, and ask the target whether or not it supports the
outliner.

After this, it's possible to query the target in TargetPassConfig, before the
outliner pass is created. This ensures that passing -enable-machine-outliner
will not modify the pass pipeline of any target that does not support it.

https://reviews.llvm.org/D48683

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335887 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 17:45:43 +00:00
Simon Pilgrim 93aa3932e7 [DAGCombiner] Ensure we use the correct CC result type in visitSDIV (REAPPLIED)
We could get away with it for constant folded cases, but not for rL335719.

Thanks to Krzysztof Parzyszek for noticing.

Reapply original commit rL335821 which was reverted at rL335871 due to a WebAssembly bug that was fixed at rL335884.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335886 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 17:33:41 +00:00
Jessica Paquette 9bc4099b79 Revert "[MachineOutliner] Add always and never options to -enable-machine-outliner"
I accidentally committed this instead of D48683 because I haven't had coffee
yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335883 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 17:26:19 +00:00
Jessica Paquette be2cdf90a3 Revert "[MachineOutliner] Never add the outliner in -O0"
This reverts commit 9c7c10e407.

It relies on r335872 since that introduces the machine outliner
flags test. I meant to commit D48683 in that commit, but got mixed
up and committed D48682 instead. So, I'm reverting this and
r335872, since D48682 hasn't made it through review yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335882 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 17:26:18 +00:00
Jessica Paquette 9c7c10e407 [MachineOutliner] Never add the outliner in -O0
We shouldn't add the outliner when compiling at -O0 even if
-enable-machine-outliner is passed in. This makes sure that we
don't add it in this case.

This also updates machine-outliner-flags to reflect the change
and improves the comment describing what that test does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335879 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 17:05:57 +00:00
Matthias Braun 294ff667fe SelectionDAGBuilder, mach-o: Skip trap after noreturn call (for Mach-O)
Add NoTrapAfterNoreturn target option which skips emission of traps
behind noreturn calls even if TrapUnreachable is enabled.

Enable the feature on Mach-O to save code size; Comments suggest it is
not possible to enable it for the other users of TrapUnreachable.

rdar://41530228

DifferentialRevision: https://reviews.llvm.org/D48674

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335877 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 17:00:45 +00:00
Jessica Paquette bd0a2a58e5 [MachineOutliner] Add always and never options to -enable-machine-outliner
To enable the MachineOutliner by default on AArch64, we need to be able to
disable the MachineOutliner and also provide an option to "always" enable the
outliner.

This adds that capability. It allows the user to still use the old
-enable-machine-outliner option, which defaults to "always". This is building
up to allowing the user to specify "always" versus the target-default
outlining behaviour.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335872 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 16:39:42 +00:00
Haojian Wu 5ed53954fb Revert "[DAGCombiner] Ensure we use the correct CC result type in visitSDIV"
This reverts commit r335821.

This crashes the webassembly test, run "ninja check-llvm-codegen-webassembly" to reproduce.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335871 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 16:25:57 +00:00
Benjamin Kramer 1bbef2cc89 Revert "Add support for generating a call graph profile from Branch Frequency Info."
This reverts commits r335794 and r335797. Breaks ThinLTO+FDO selfhost.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335851 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 13:15:03 +00:00
Simon Pilgrim 5796a8d871 [DAGCombiner] Ensure we use the correct CC result type in visitSDIV
We could get away with it for constant folded cases, but not for rL335719.

Thanks to Krzysztof Parzyszek for noticing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335821 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 09:54:28 +00:00
Simon Pilgrim 5016671ee0 [DAGCombiner] Remove unused variable. NFCI.
Noticed in D45806 review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335817 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 09:29:08 +00:00
Petar Jovanovic e1714df0ef [DwarfDebug] Remove unused argument (NFC)
Remove unused ByteStreamer argument from function emitDebugLocValue.

Patch by Nikola Prica.

Differential Revision: https://reviews.llvm.org/D48590


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335811 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-28 04:50:40 +00:00
Michael J. Spencer 71b21d8fcc Add support for generating a call graph profile from Branch Frequency Info.
=== Generating the CG Profile ===

The CGProfile module pass simply gets the block profile count for each BB and scans for call instructions.  For each call instruction it adds an edge from the current function to the called function with the current BB block profile count as the weight.

After scanning all the functions, it generates an appending module flag containing the data. The format looks like:
```
!llvm.module.flags = !{!0}

!0 = !{i32 5, !"CG Profile", !1}
!1 = !{!2, !3, !4} ; List of edges
!2 = !{void ()* @a, void ()* @b, i64 32} ; Edge from a to b with a weight of 32
!3 = !{void (i1)* @freq, void ()* @a, i64 11}
!4 = !{void (i1)* @freq, void ()* @b, i64 20}
```

Differential Revision: https://reviews.llvm.org/D48105

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335794 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-27 23:58:08 +00:00
Nirav Dave f162464ba8 [DAGCombine] Disable TokenFactor simplifications when optnone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335773 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-27 19:41:25 +00:00
Daniel Sanders 576283c119 [globalisel][legalizer] Add AtomicOrdering to LegalityQuery and use it in AArch64
Now that we have the ability to legalize based on MMO's. Add support for
legalizing based on AtomicOrdering and use it to correct the legalization
of the atomic instructions.

Also extend all() to be a variadic template as this ruleset now requires
3 and 4 argument versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335767 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-27 19:03:21 +00:00
Sanjay Patel 3d6697fe50 [DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
As noted in the D44909 review, the transform from (fptosi+sitofp) to ftrunc 
can produce -0.0 where the original code does not:

#include <stdio.h>
  
int main(int argc) {
  float x;
  x = -0.8 * argc;
  printf("%f\n", (float)((int)x));
  return 0;
}

$ clang -O0 -mavx fp.c ; ./a.out 
0.000000
$ clang -O1 -mavx fp.c ; ./a.out 
-0.000000

Ideally, we'd use IR/node flags to predicate the transform, but the IR parser 
doesn't currently allow fast-math-flags on the cast instructions. So for now, 
just use the function attribute that corresponds to clang's "-fno-signed-zeros" 
option.

Differential Revision: https://reviews.llvm.org/D48085


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335761 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-27 18:16:40 +00:00
Jessica Paquette 43d4585d61 [MachineOutliner] Don't outline sequences where x16/x17/nzcv are live across
It isn't safe to outline sequences of instructions where x16/x17/nzcv live
across the sequence.

This teaches the outliner to check whether or not a specific canidate has
x16/x17/nzcv live across it and discard the candidate in the case that that is
true.

https://bugs.llvm.org/show_bug.cgi?id=37573
https://reviews.llvm.org/D47655

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335758 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-27 17:43:27 +00:00
Simon Pilgrim 16742ac8e4 [DAGCombiner] visitSDIV - add special case handling for (sdiv X, 1) -> X in pow2 expansion
For divisor = 1, perform a select of X - reduces scalarisation of simple SDIVs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335727 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-27 12:45:31 +00:00
Simon Pilgrim 8a57afce61 [DAGCombiner] visitSDIV - simplify pow2 handling. NFCI.
Use the builtin constant folding of getNode() etc. instead of doing it manually.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335720 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-27 10:51:55 +00:00
Simon Pilgrim 988e5b9752 [DAGCombiner] Fold SDIV(%X, MIN_SIGNED) -> SELECT(%X == MIN_SIGNED, 1, 0)
Fixes PR37569.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335719 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-27 10:21:06 +00:00
Simon Pilgrim 1f74921dd7 [DAGCombiner] Don't accept signbit sdiv divisors in sdiv-by-pow2 vector expansion (PR37569)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335717 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-27 09:41:22 +00:00
Sanjay Patel 95b187a7dd [DAGCombiner] use isBitwiseNot to simplify code; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335652 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-26 19:46:56 +00:00
Simon Pilgrim 67cc73d7b2 [DAGCombiner] Don't accept -1 sdiv divisors in sdiv-by-pow2 vector expansion (PR37119)
Temporary fix until I've managed to get D45806 updated - both +1 and -1 special cases need to be properly supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335637 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-26 17:46:51 +00:00