Commit Graph

146705 Commits

Author SHA1 Message Date
Matt Arsenault
45fb365cc4 AMDGPU: Fix not including v2i16/v2f16 in register class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298390 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:42:50 +00:00
Adrian Prantl
eb45ecd466 Don't compose DWARF expressions with multiple subregisters.
If a register location can only be described by a complex expression
(i.e., multiple subregisters) it doesn't safely compose with another
complex expression. For example, it is not possible to apply a
DW_OP_deref operation to multiple DW_OP_pieces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298389 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:37:39 +00:00
Adrian Prantl
3ba5a60c7b DwarfExpression: Defer emitting DWARF register operations
until the rest of the expression is known.

This is still an NFC refactoring in preparation of a subsequent bugfix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298388 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:37:35 +00:00
Matt Arsenault
b5f0660c6b AMDGPU: Fix asserting on 0 dmask for image intrinsics
Fold these to undef during lowering so users get eliminated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298387 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:32:17 +00:00
Matt Arsenault
b216ff22ea AMDGPU: Convert image intrinsic uses in tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298386 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:24:12 +00:00
Matt Arsenault
0597e5e3b0 DAG: Fold bitcast/extract_vector_elt of undef to undef
Fixes not eliminating store when intrinsic is lowered to undef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298385 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:20:16 +00:00
Simon Pilgrim
b8fa10fdbf Fix shufpd test name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298381 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 15:12:53 +00:00
Sanne Wouda
94612f1d5f [ARM] [Assembler] Support negative immediates for A32, T32 and T16
Summary:
To support negative immediates for certain arithmetic instructions, the
instruction is converted to the inverse instruction with a negated (or inverted)
immediate. For example, "ADD r0, r1, #FFFFFFFF" cannot be encoded as an ADD
instruction.  However, "SUB r0, r1, #1" is equivalent.

These conversions are different from instruction aliases.  An alias maps
several assembler instructions onto one encoding.  A conversion, however, maps
an *invalid* instruction--e.g. with an immediate that cannot be represented in
the encoding--to a different (but equivalent) instruction.

Several instructions with negative immediates were being converted already, but
this was not systematically tested, nor did it cover all instructions.

This patch implements all possible substitutions for ARM, Thumb1 and
Thumb2 assembler and adds tests.  It also adds a feature flag
(-mattr=+no-neg-immediates) to turn these substitutions off.  This is
helpful for users who want their code to assemble to exactly what they
wrote.

Reviewers: t.p.northover, rovka, samparker, javed.absar, peter.smith, rengolin

Reviewed By: javed.absar

Subscribers: aadg, aemerson, llvm-commits

Differential Revision: https://reviews.llvm.org/D30571


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298380 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 14:59:17 +00:00
Yi Kong
656673e86d Test commit access
Remove some trailing whitespaces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298379 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 14:49:19 +00:00
Sanjay Patel
1c3d706922 [InstCombine] auto-generate better checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298377 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 14:04:44 +00:00
Sanjay Patel
abbd326847 [x86] use PMOVMSK for vector-sized equality comparisons
We could do better by splitting any oversized type into whatever vector size the target supports, 
but I left that for future work if it ever comes up. The motivating case is memcmp() calls on 16-byte
structs, so I think we can wire that up with a TLI hook that feeds into this.

Differential Revision: https://reviews.llvm.org/D31156


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298376 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 13:50:33 +00:00
Simon Pilgrim
114c9e2aed [X86][AVX] Tests showing missing SHUFPD + ZERO lowering
This lowers to SHUFPD if the input is zeroinitializer but not with a demanded elts optimized build vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298370 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 13:30:40 +00:00
Valery Pykhtin
4b7cf6c175 [AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
Differential revision: https://reviews.llvm.org/D31046

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298368 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 13:15:46 +00:00
Volkan Keles
b5adc93d42 [GlobalISel] Fix shufflevector tests
clang-lld-x86_64-2stage fails because of the order
of the instructions. `CHECK-DAG` directives should
fix the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298367 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 13:12:59 +00:00
Sam Kolton
f885500f47 [ADMGPU] SDWA peephole optimization pass.
Summary:
First iteration of SDWA peephole.

This pass tries to combine several instruction into one SDWA instruction. E.g. it converts:
'''
    V_LSHRREV_B32_e32 %vreg0, 16, %vreg1
    V_ADD_I32_e32 %vreg2, %vreg0, %vreg3
    V_LSHLREV_B32_e32 %vreg4, 16, %vreg2
'''
Into:
'''
   V_ADD_I32_sdwa %vreg4, %vreg1, %vreg3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
'''

Pass structure:
    1. Iterate over machine instruction in basic block and try to apply "SDWA patterns" to each of them. SDWA patterns match machine instruction into either source or destination SDWA operand. E.g. ''' V_LSHRREV_B32_e32 %vreg0, 16, %vreg1''' is matched to source SDWA operand '''%vreg1 src_sel:WORD_1'''.
    2. Iterate over found SDWA operands and find instruction that could be potentially coverted into SDWA. E.g. for source SDWA operand potential instruction are all instruction in this basic block that uses '''%vreg0'''
    3. Iterate over all potential instructions and check if they can be converted into SDWA.
    4. Convert instructions to SDWA.

This review contains basic implementation of SDWA peephole pass. This pass requires additional testing fot both correctness and performance (no performance testing done).
There are several ways this pass can be improved:
    1. Make this pass work on whole function not only basic block. As I can see this can be done right now without changes to pass.
    2. Introduce more SDWA patterns
    3. Introduce mnemonics to limit when SDWA patterns should apply

Reviewers: vpykhtin, alex-t, arsenm, rampitec

Subscribers: wdng, nhaehnle, mgorny

Differential Revision: https://reviews.llvm.org/D30038

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298365 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 12:51:34 +00:00
Andrea Di Biagio
26b9b438fd [DebugInfo][X86] Teach Optimize LEAs pass to handle debug values
This patch fixes an issue in the Optimize LEAs pass where redundant LEAs were
not removed because they were being used by debug values. The debug values are
now ignored when determining whether LEAs are redundant.

For now the debug values for the redundant LEAs are marked as undefined,
effectively lost. The intention is for a follow up patch which will attempt to
preserve the debug values where possible.

Patch by Andrew Ng.

Differential Revision: https://reviews.llvm.org/D30835


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298360 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 11:36:21 +00:00
Artur Pilipenko
1ec8346b66 NFC. InstCombiner::visitFAdd extract LHSIntVal/RHSIntVal local variables
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298359 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 11:32:15 +00:00
Volkan Keles
c2eb9ef056 [GlobalISel] Move isTriviallyDead to Utils. NFC.
Make it accessible by the targets to avoid code duplication.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298358 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 10:47:35 +00:00
Jonas Paulsson
92b0e9b3cb [DAGTypeLegalizer] Handle widening truncate to vector of i1.
Previously, PromoteIntRes_TRUNCATE() did not handle the case where
the operand needs widening, which resulted in llvm_unreachable().

This patch adds the needed handling, along with a test case.

Review: Eli Friedman, Simon Pilgrim.
https://reviews.llvm.org/D31077

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298357 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 10:24:14 +00:00
David Green
8b2132abbe [ConstantFolding] Fix to prevent constant folding having to repeatedly scan operands. NFCI
After the loop unroll threshold was increased in r295538, very
large constant expressions can be created. This prevents them
from having to be recursively scanned, leading to a compile
time blow-up.

Differential Revision: https://reviews.llvm.org/D30689



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298356 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 10:17:39 +00:00
Volkan Keles
de5c0c25c0 [GlobalISel] Translate shufflevector
Reviewers: qcolombet, aditya_nandakumar, t.p.northover, javed.absar, ab, dsanders

Reviewed By: javed.absar

Subscribers: dberris, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D30962

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298347 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 08:44:13 +00:00
Craig Topper
995cf144ac [APFloat] Tag the fltSemantic getter functions with LLVM_READNONE.
This gives about an 8k reduction in the size of the opt binary on my local x86-64 build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298344 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 07:18:00 +00:00
Craig Topper
cf6aac623a [APInt] Add LLVM_READONLY to some methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298342 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 06:19:46 +00:00
Jonas Paulsson
1853ec1bda [SystemZ] Don't drop MO flags in foldMemoryOperandImpl()
The def operand of the new LG/LD should have the old def operands
flags and subreg index.

New test: test/CodeGen/SystemZ/fold-memory-op-impl.ll

Review: Ulrich Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298341 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 05:49:40 +00:00
Serge Pavlov
bbcc0db379 Fix evaluation of LLVM_DEFINITIONS
CMake variable LLVM_DEFINITIONS collects preprocessor definitions provided
for host compiler that builds llvm components. A function
add_llvm_definitions was introduced in AddLLVMDefinitions.cmake to keep
track of these definitions and was intended to be a replacement for CMake
command add_definitions. Actually in many cases add_definitions is still
used and the content of LLVM_DEFINITIONS is not actual now. On the other
hand the current version of CMake allows getting set of definitions in a
more convenient way. This fix implements evaluation of the variable by
reading corresponding cmake property.

Differential Revision: https://reviews.llvm.org/D31125


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298336 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 04:03:24 +00:00
Vitaly Buka
9fe7c74027 Revert "[Hexagon] Recognize polynomial-modulo loop idiom again"
Fix memory leaks on check-llvm tests detected by Asan.

This reverts commit r298282.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298329 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 00:59:51 +00:00
Eli Friedman
4355f366da [ARM] Revert r297443 and r297820.
The glueless lowering of addc/adde in Thumb1 has known serious
miscompiles (see https://reviews.llvm.org/D31081), and r297820
causes an infinite loop for certain constructs.  It's not
clear when they will be fixed, so let's just take them out
of the tree for now.

(I resolved a small conflict with r297453.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298328 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 00:26:39 +00:00
Zachary Turner
254674aa55 [Support] Fill the file_status struct with link count.
Differential Revision: https://reviews.llvm.org/D31110

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298326 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 23:55:20 +00:00
Zachary Turner
e40105539c Add a function to MD5 a file's contents.
In doing so, clean up the MD5 interface a little.  Most
existing users only care about the lower 8 bytes of an MD5,
but for some users that care about the upper and lower,
there wasn't a good interface.  Furthermore, consumers
of the MD5 checksum were required to handle endianness
details on their own, so it seems reasonable to abstract
this into a nicer interface that just gives you the right
value.

Differential Revision: https://reviews.llvm.org/D31105

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298322 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 23:33:18 +00:00
Vadzim Dambrouski
a734e28872 [ARM] Fix PR32130: Handle promotion of zero sized constants.
The special case of zero sized values was previously not handled correctly.
This patch handles this by not promoting if the size is zero.

Patch by Tim Neumann.

Differential Revision: https://reviews.llvm.org/D31116

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298320 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 22:59:57 +00:00
Sanjay Patel
1f5f67010f [x86] add tests for setcc of i128/i256; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298317 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 22:15:40 +00:00
Matt Arsenault
db4ce1d165 InstCombine: Check source value precision when reducing cast intrinsic
Missed this check when porting from the libcall version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298312 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 21:59:24 +00:00
Tim Northover
b38a51e92c GlobalISel: add implicit defs & uses when mutating an instruction.
Otherwise a scheduler might do bad things to the code we produce.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298311 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 21:58:23 +00:00
Adrian Prantl
fd23a127ca Replace uses of DwarfExpression::addMachineReg* with addMachineRegExpression
and mark the methods as protected.

Besides reducing the surface area of DwarfExpression, this is in
preparation for an upcoming bugfix in the DwarfExpression
implementation, for which it will be necessary to defer emitting
register operations until the rest of the expression is known.

NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298309 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 21:35:09 +00:00
Adrian Prantl
c6ad6fa247 Make implementation details in DwarfExpression protected. (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298308 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 21:34:19 +00:00
Evgeniy Stepanov
3fd77c94a3 [Fuchsia] Use %gs for ABI slots under -mcmodel=kernel
Make x86_64-fuchsia targets under -mcmodel=kernel use %gs rather
than %fs to access ABI slots for stack-protector and safe-stack

Patch by Roland McGrath.

Differential Revision: https://reviews.llvm.org/D30870

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298302 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 20:35:37 +00:00
Eli Friedman
f7acf0537e [SCEV] Fix trip multiple calculation
If loop bound containing calculations like min(a,b), the Scalar
Evolution API getSmallConstantTripMultiple returns 4294967295 "-1"
as the trip multiple. The problem is that, SCEV use -1 * umax to
represent umin. The multiple constant -1 was returned, and the logic
of guarding against huge trip counts was skipped. Because -1 has 32
active bits.

The fix attempt to factor more general cases. First try to get the
greatest power of two divisor of trip count expression. In case
overflow happens, the trip count expression is still divisible by the
greatest power of two divisor returned. Returns 1 if not divisible by 2.

Patch by Huihui Zhang <huihuiz@codeaurora.org>

Differential Revision: https://reviews.llvm.org/D30840



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298301 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 20:25:46 +00:00
David L. Jones
fd60195706 [X86] Clean up test/CodeGen/X86/2006-03-01-InstrSchedBug.ll
Summary:
- Migrated from grep to FileCheck.
- Re-indented, removed boilerplate comments.
- Added 'entry' label at beginning of basic block.

Patch by Jorge Gorbe!

Reviewed By: RKSimon

Subscribers: RKSimon, jgorbe, llvm-commits

Differential Revision: https://reviews.llvm.org/D30317

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298298 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 20:10:30 +00:00
Zachary Turner
7d6ca05af0 Explicitly add move constructor/assignment operators.
These are needed due to some obscure rules in the standard
about how std::vector selects between copy and move
constructors, which can cause a conforming implementation
to attempt to select the copy constructor of RuleMatcher,
which will fail since std::unique_ptr<> isn't copyable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298294 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 19:56:52 +00:00
Nirav Dave
653b4239a7 Add test case for merging of chained stores of mismatched type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298293 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 19:48:22 +00:00
Kevin Enderby
1ae32f1960 Add the rest of the error checking for Mach-O dyld compact bind entry errors
and test cases for each of the error checks.

To do this more plumbing was needed so that the segment indexes and
segment offsets can be checked.  Basically what was done was the SegInfo
from llvm-objdump’s MachODump.cpp was moved into libObject for Mach-O
objects as BindRebaseSegInfo and it is only created when an iterator for
bind or rebase entries are created.

This commit really only adds the error checking and test cases for the
bind table entires and the checking for the lazy bind and weak bind entries
are still to be fully done as well as the rebase entires.  Though some of
the plumbing for those are added with this commit.  Those other error
checks and test cases will be added in follow on commits.

Note, the two llvm_unreachable() calls should now actually be unreachable
with the error checks in place and would take a logic bug in the error
checking code to be reached if the segment indexes and segment
offsets are used from a checked bind entry.  Comments have been added
to the methods that require the arguments to have been checked
prior to calling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298292 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 19:46:55 +00:00
Evgeniy Stepanov
d3ffac83c0 Revert r298158.
Revert "[asan] Fix dead stripping of globals on Linux."

OOM in gold linker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298288 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 18:45:34 +00:00
Simon Pilgrim
dae8f9a508 Fixed include order. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298286 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 18:33:23 +00:00
Peter Collingbourne
3cd1f18f47 Try using llvm::errc, should hopefully fix version mismatch problem on clang-s390x-linux bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298285 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 18:19:41 +00:00
Krzysztof Parzyszek
fea30225e1 [Hexagon] Recognize polynomial-modulo loop idiom again
Regain the ability to recognize loops calculating polynomial modulo
operation. This ability has been lost due to some changes in the
preceding optimizations. Add code to preprocess the IR to a form
that the pattern matching code can recognize.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298282 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 18:12:58 +00:00
Konstantin Zhuravlyov
f6fa4ce469 [AMDGPU] Run always inliner early in opt
Differential Revision: https://reviews.llvm.org/D31141


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298281 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 18:06:45 +00:00
Daniel Berlin
b4a2b00680 Add missing updated test from VN coercion changes. Instructions were renamed. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298280 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 18:04:19 +00:00
David Blaikie
1f1cffb8e5 Fix UB found by -Wtautological-undefined-compare
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298279 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 18:01:07 +00:00
Jonathan Roelofs
56d588a775 Mention that the Sphinx docs build wants version 1.5 or later
`misc.highlighting_failure` support was added to `suppress_warnings` in that
version, and the warnings-as-errors docs build relies on it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298277 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 17:49:36 +00:00
Reid Kleckner
3993050daa [WinEH] Adjust decision to emit SEH moves for leaf functions
Move the check for "MF->hasWinCFI()" up into the calculation of the
shouldEmitMoves boolean, rather than putting it in the early returning
if. This ensures that endFunction doesn't try to emit .seh_* directives
for leaf functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298276 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 17:45:59 +00:00