Commit Graph

186944 Commits

Author SHA1 Message Date
Nekotekina
514a46aa1e X86: LowerShift: new algorithm for vector-vector shifts
Emit pair of shifts of double size if possible
2019-10-23 17:17:50 +03:00
Nekotekina
19471fa18c X86: Fix/workaround Small Code Model for JIT
Force RIP-relative jump tables and global values
Force RIP-relative all zeros / all ones constants
These things were causing crashes due to use of absolute addressing
2019-10-23 14:16:16 +03:00
Ivan
7ff4bd1999 Set up CI with Azure Pipelines
[skip ci]
2019-10-23 14:16:16 +03:00
David Green
2c4ca6832f [InstCombine] Signed saturation patterns
This adds an instcombine matcher for code that attempts to perform signed
saturating arithmetic by casting to a higher type. Unsigned cases are already
matched, this adds extra matches for the more complex signed cases, which
involves matching the min(max(add a b)) nodes with proper extends to ensure
legality.

Differential Revision: https://reviews.llvm.org/D68651


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375505 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 15:39:47 +00:00
David Green
6e8533b056 [InstCombine] Signed saturation tests. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375503 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 14:49:40 +00:00
Petar Avramovic
e6fb6db568 [MIParser] Set RegClassOrRegBank during instruction parsing
MachineRegisterInfo::createGenericVirtualRegister sets
RegClassOrRegBank to static_cast<RegisterBank *>(nullptr).
MIParser on the other hand doesn't. When we attempt to constrain
Register Class on such VReg, additional COPY is generated.
This way we avoid COPY instructions showing in test that have MIR
input while they are not present with llvm-ir input that was used
to create given MIR for a -run-pass test.

Differential Revision: https://reviews.llvm.org/D68946


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375502 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 14:25:37 +00:00
Petar Avramovic
ee57dd4921 [MIPS GlobalISel] Select MSA vector generic and builtin add
Select vector G_ADD for MIPS32 with MSA. We have to set bank
for vector operands to fprb and selectImpl will do the rest.
__builtin_msa_addv_<format> will be transformed into G_ADD
in legalizeIntrinsic and selected in the same way.
__builtin_msa_addvi_<format> will be directly selected into
ADDVI_<format> in legalizeIntrinsic. MIR tests for it have
unnecessary additional copies. Capture current state of tests
with run-pass=legalizer with a test in test/CodeGen/MIR/Mips.

Differential Revision: https://reviews.llvm.org/D68984


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375501 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 13:51:57 +00:00
Eugene Leviant
a461b7a03c [ThinLTO] Add code comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375500 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 12:57:23 +00:00
Guillaume Chatelet
31ec98d4e0 [Alignment][NFC] Convert StoreInst to MaybeAlign
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69303

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375499 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 12:55:32 +00:00
Guillaume Chatelet
8b6d26ec66 [Alignment][NFC] Convert LoadInst to MaybeAlign
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69302

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375498 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 12:35:55 +00:00
Nemanja Ivanovic
4a0e8977ca [PowerPC] Turn on CR-Logical reducer pass
This re-commits r375152 which was pulled in r375233 because it broke
the EXPENSIVE_CHECKS bot on Windows.

The reason for the failure was a bug in the pass that the commit turned
on by default. This patch fixes that bug and turns the pass back on.
This patch has been verified on the buildbot that originally failed
thanks to Simon Pilgrim.

Differential revision: https://reviews.llvm.org/D52431


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375497 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 12:20:38 +00:00
Guillaume Chatelet
77450cd609 [Alignment][NFC] Use MaybeAlign in AttrBuilder
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69300

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375496 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 11:57:52 +00:00
Guillaume Chatelet
672893cf12 [Alignment][NFC] Attributes use Align/MaybeAlign
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: jholewinski, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69278

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375495 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 09:51:06 +00:00
Eugene Leviant
55b4ec9194 [ThinLTO] Don't internalize during promotion
Differential revision: https://reviews.llvm.org/D69107


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375493 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 09:24:12 +00:00
George Rimar
5cd00d15af [LLVMDebugInfoPDB] - Use cantFail() instead of assert().
Currently injected-sources-native.test fails with "Expected<T>
value was in success state.
(Note: Expected<T> values in success mode must still be checked
prior to being destroyed)"
when llvm is compiled with LLVM_ENABLE_ABI_BREAKING_CHECKS in Release.

The problem is that getStringForID returns Expected<StringRef>
and Expected value must always be checked, even if it is in success state.
Checking with assert only helps in Debug and is wrong.

Differential revision: https://reviews.llvm.org/D69251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375492 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 08:52:45 +00:00
Martin Storsjo
d35e5f8dde [CMake] [WinMsvc] Look for includes and libs in ${MSVC_BASE}/atlmfc
This is necessary if building with the DIA SDK enabled.

Differential Revision: https://reviews.llvm.org/D69240

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375486 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 06:36:27 +00:00
Martin Storsjo
5205202f41 [CMake] Allow overriding MSVC_DIA_SDK_DIR via CMake
This eases using it in cross-msvc setups.

Differential Revision: https://reviews.llvm.org/D69239

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375485 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 06:36:21 +00:00
GN Sync Bot
719615b78f gn build: Merge r375483
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375484 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 05:09:35 +00:00
Julian Lettner
eab745a12b [lit] Move increase_process_limit to ParallelRun
Increasing the process limit only makes sense when we use multiple
processes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375474 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-22 01:13:30 +00:00
Simon Pilgrim
9c3636fbb6 [X86][BMI] Pull out schedule classes from bmi_andn<> and bmi_bls<>
Stop hardwiring classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375470 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 23:41:40 +00:00
Simon Pilgrim
1e4c44b0d4 [X86][SSE] Add OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1))) -> MOVMSK+CMP reduction combine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375463 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 22:36:31 +00:00
Simon Pilgrim
d8c44a50c7 [X86][SSE] Add OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1))) movmsk v2X64 tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375462 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 22:36:07 +00:00
Lang Hames
88e224ab97 [examples] Add a dependency on ExecutionEngine to LLJITWithObjectCache example.
ExecutionEngine.cpp contains the anchor() for the ObjectCache base class, so we
need an explicit dependency on it.

Patch by Stephen Neuendorffer. Thanks Stephen!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375461 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 22:29:29 +00:00
Austin Kerbow
34e11f6a0a AMDGPU/GlobalISel: Legalize fast unsafe FDIV
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, dstuttard, tpr, t-tye, hiraditya, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69231

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375460 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 22:18:26 +00:00
Julian Lettner
6556cd04b7 [lit] Simplify test scheduling via multiprocessing.Pool
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375458 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 21:57:18 +00:00
Matt Arsenault
e672b94bb1 AMDGPU: Select basic interp directly from intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375457 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 21:49:44 +00:00
Julian Lettner
4d5ceef545 [lit] Remove redundancy from names and comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375456 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 21:41:59 +00:00
Roman Lebedev
d8ca3c0d57 [CVP] No-wrap deduction for shl
Summary:
This is the last `OverflowingBinaryOperator` for which we don't deduce flags.
D69217 taught `ConstantRange::makeGuaranteedNoWrapRegion()` about it.

The effect is better than of the `mul` patch (D69203):

| statistic                              |     old |     new | delta | % change |
| correlated-value-propagation.NumAddNUW |    7145 |    7144 |    -1 | -0.0140% |
| correlated-value-propagation.NumAddNW  |   12126 |   12125 |    -1 | -0.0082% |
| correlated-value-propagation.NumAnd    |     443 |     446 |     3 |  0.6772% |
| correlated-value-propagation.NumNSW    |    5986 |    7158 |  1172 | 19.5790% |
| correlated-value-propagation.NumNUW    |   10512 |   13304 |  2792 | 26.5601% |
| correlated-value-propagation.NumNW     |   16498 |   20462 |  3964 | 24.0272% |
| correlated-value-propagation.NumShlNSW |       0 |    1172 |  1172 |          |
| correlated-value-propagation.NumShlNUW |       0 |    2793 |  2793 |          |
| correlated-value-propagation.NumShlNW  |       0 |    3965 |  3965 |          |
| instcount.NumAShrInst                  |   13824 |   13790 |   -34 | -0.2459% |
| instcount.NumAddInst                   |  277584 |  277586 |     2 |  0.0007% |
| instcount.NumAndInst                   |   66061 |   66056 |    -5 | -0.0076% |
| instcount.NumBrInst                    |  709153 |  709147 |    -6 | -0.0008% |
| instcount.NumICmpInst                  |  483709 |  483708 |    -1 | -0.0002% |
| instcount.NumSExtInst                  |   79497 |   79496 |    -1 | -0.0013% |
| instcount.NumShlInst                   |   40691 |   40654 |   -37 | -0.0909% |
| instcount.NumSubInst                   |   61997 |   61996 |    -1 | -0.0016% |
| instcount.NumZExtInst                  |   68208 |   68211 |     3 |  0.0044% |
| instcount.TotalBlocks                  |  843916 |  843910 |    -6 | -0.0007% |
| instcount.TotalInsts                   | 7387528 | 7387448 |   -80 | -0.0011% |

Reviewers: nikic, reames, sanjoy, timshen

Reviewed By: nikic

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69277

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375455 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 21:31:19 +00:00
Quentin Colombet
c1a274e767 [GISel][CombinerHelper] Add a combine turning shuffle_vector into concat_vectors
Teach the CombinerHelper how to turn shuffle_vectors, that
concatenate vectors, into concat_vectors and add this combine
to the AArch64 pre-legalizer combiner.

Differential Revision: https://reviews.llvm.org/D69149

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375452 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 20:39:58 +00:00
Matt Arsenault
208bbb1797 AMDGPU: Use CopyToReg for interp intrinsic lowering
This doesn't use the default value, so doesn't benefit from the hack
to help optimize it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375450 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 19:53:49 +00:00
Matt Arsenault
fdc698b726 AMDGPU: Erase redundant redefs of m0 in SIFoldOperands
Only handle simple inter-block redefs of m0 to the same value. This
avoids interference from redefs of m0 in SILoadStoreOptimzer. I was
initially teaching that pass to ignore redefs of m0, but having them
not exist beforehand is much simpler.

This is in preparation for deleting the current special m0 handling in
SIFixSGPRCopies to allow the register coalescer to handle the
difficult cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375449 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 19:53:46 +00:00
Matt Arsenault
ab2c9f7c79 AMDGPU: Stop adding m0 implicit def to SGPR spills
r375293 removed the SGPR spilling with scalar stores path, so this is
no longer necessary. This also always had the defect of adding the def
even when this path wasn't in use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375448 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 19:42:29 +00:00
Matt Arsenault
12be54ce90 AMDGPU: Slightly restructure m0 init code
This will allow using another operation to produce the glue in a
future change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375447 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 19:42:26 +00:00
Stanislav Mekhanoshin
6e6c5e79c9 [AMDGPU] Select AGPR in PHI operand legalization
If a PHI defines AGPR legalize its operands to AGPR.
At the moment we can get an AGPR PHI with VGPR operands.
I am not aware of any problems as it seems to be handled
gracefully in RA, but this is not right anyway.

It also slightly decreases VGPR pressure in some cases
because we do not have to a copy via VGPR.

Differential Revision: https://reviews.llvm.org/D69206

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375446 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 19:25:27 +00:00
Simon Pilgrim
b1407138d4 [X86] Rename matchBitOpReduction to matchScalarReduction. NFCI.
This doesn't need to be just for bitops, but the ops do need to be fully associative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375445 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 19:19:50 +00:00
Sander de Smalen
f5e25f84fa Reverted r375425 as it broke some buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375444 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 19:11:40 +00:00
Roman Lebedev
c0f32bd552 [NFC][CVP] Add shl no-wrap deduction test coverage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375441 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 18:35:26 +00:00
Bjorn Pettersson
b172b0f36f Prune Pass.h include from DataLayout.h. NFCI
Summary:
Reduce include dependencies by no longer including Pass.h from
DataLayout.h. That include seemed irrelevant to DataLayout, as
well as being irrelevant to several users of DataLayout.

Reviewers: rnk

Reviewed By: rnk

Subscribers: mehdi_amini, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D69261

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375436 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:51:54 +00:00
Simon Pilgrim
aa0a5ffb56 [PowerPC] Regenerate test for D52431
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375435 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:45:51 +00:00
Raphael Isemann
a3e4f5daf6 [NFC] Add missing include to fix modules build
This header doesn't seem to be parsable on its own and breaks the module build therefore with
the following error:

While building module 'LLVM_Backend' imported from llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp:14:
In file included from <module-includes>:62:
llvm-project/llvm/include/llvm/CodeGen/MachinePipeliner.h:91:20: error: declaration of 'AAResultsWrapperPass' must be imported from module 'LLVM_Analysis.AliasAnalysis' before it is required
    AU.addRequired<AAResultsWrapperPass>();
                   ^
llvm-project/llvm/include/llvm/Analysis/AliasAnalysis.h:1157:7: note: previous declaration is here
class AAResultsWrapperPass : public FunctionPass {
      ^
llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp:14:10: fatal error: could not build module 'LLVM_Backend'
 ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2 errors generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375433 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:43:38 +00:00
Simon Pilgrim
25c29219cb SystemZISelLowering - supportedAddressingMode - silence static analyzer dyn_cast<> null dereference warning. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375430 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:16:03 +00:00
Simon Pilgrim
2ae2f59248 GVNHoist - silence static analyzer dyn_cast<> null dereference warning in hasEHOrLoadsOnPath call. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375429 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:15:49 +00:00
Simon Pilgrim
c4c5944aa9 GuardWidening - silence static analyzer null dereference warning with assertion. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375428 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:15:37 +00:00
Simon Pilgrim
b0db20ce62 CrossDSOCFI - silence static analyzer dyn_cast<> null dereference warning. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375427 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:15:25 +00:00
Simon Pilgrim
72157fef87 IndVarSimplify - silence static analyzer dyn_cast<> null dereference warning. NFCI.
The static analyzer is warning about a potential null dereference, but we should be able to use cast<> directly and if not assert will fire for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375426 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:15:05 +00:00
Sander de Smalen
4548d296c1 [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2)
Commit message from D66935:

This patch fixes a bug exposed by D65653 where a subsequent invocation
of `determineCalleeSaves` ends up with a different size for the callee
save area, leading to different frame-offsets in debug information.

In the invocation by PEI, `determineCalleeSaves` tries to determine
whether it needs to spill an extra callee-saved register to get an
emergency spill slot. To do this, it calls 'estimateStackSize' and
manually adds the size of the callee-saves to this. PEI then allocates
the spill objects for the callee saves and the remaining frame layout
is calculated accordingly.

A second invocation in LiveDebugValues causes estimateStackSize to return
the size of the stack frame including the callee-saves. Given that the
size of the callee-saves is added to this, these callee-saves are counted
twice, which leads `determineCalleeSaves` to believe the stack has
become big enough to require spilling an extra callee-save as emergency
spillslot. It then updates CalleeSavedStackSize with a larger value.

Since CalleeSavedStackSize is used in the calculation of the frame
offset in getFrameIndexReference, this leads to incorrect offsets for
variables/locals when this information is recalculated after PEI.

This patch fixes the lldb unit tests in `functionalities/thread/concurrent_events/*`

Changes after D66935:

Ensures AArch64FunctionInfo::getCalleeSavedStackSize does not return
the uninitialized CalleeSavedStackSize when running `llc` on a specific
pass where the MIR code has already been expected to have gone through PEI.

Instead, getCalleeSavedStackSize (when passed the MachineFrameInfo) will try
to recalculate the CalleeSavedStackSize from the CalleeSavedInfo. In debug
mode, the compiler will assert the recalculated size equals the cached
size as calculated through a call to determineCalleeSaves.

This fixes two tests:
  test/DebugInfo/AArch64/asan-stack-vars.mir
  test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
that otherwise fail when compiled using msan.

Reviewed By: omjavaid, efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375425 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 17:12:56 +00:00
Xiangling Liao
c994a35a0d [NFC] Cleanup with variable name IsPPC64 & IsDarwin
Clean up PPCAsmPrinter with IsPPC64 and IsDarwin.

Differential Revision: https://reviews.llvm.org/D69259

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2019-10-21 15:36:13 +00:00
Guillaume Chatelet
ff6e4d503c [Alignment][NFC] Finish transition for Loads
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, asbirlea, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69253

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375419 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 15:10:26 +00:00
Jay Foad
a3253c0261 Pre-commit test cases for D64713.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375418 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-21 15:01:59 +00:00
David Green
4bdbcfddaf [Types] Define a getWithNewBitWidth for Types and make use of it
This is designed to change the bitwidth of a type without altering the number
of vector lanes. Also useful in D68651. Otherwise an NFC.

Differential Revision: https://reviews.llvm.org/D69139


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2019-10-21 14:51:49 +00:00