Commit Graph

178414 Commits

Author SHA1 Message Date
Simon Pilgrim
e7abc631a8 Fix Wparentheses warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359299 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 12:23:42 +00:00
George Rimar
c10ed4a914 [yaml2obj] - Make the code to match the LLVM style. NFCI.
This renames the variables to uppercase and
removes use of `auto` for unobvious type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359298 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 12:20:51 +00:00
George Rimar
8399432f4d [yaml2elf] - Cleanup the initSectionHeaders(). NFCI.
This encapsulates the section specific code inside the
corresponding writeSectionContent methods.
Making the code a bit more consistent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359297 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 12:15:32 +00:00
Simon Pilgrim
edf11da458 [X86][SSE] Pull out OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1),...)) matching code from LowerVectorAllZeroTest
Create a matchBitOpReduction helper that checks for the pattern with any opcode.

First step towards reusing this code to recognize other scalar reduction patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359296 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 11:45:54 +00:00
Nico Weber
0f088d2720 Minor formatting tweak, no behavior change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359295 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 11:44:10 +00:00
Fangrui Song
f52833fc11 caseFoldingDjbHash: simplify and make the US-ASCII fast path faster
The slow path (with at least one non US-ASCII) will be slower but that
doesn't matter.

Differential Revision: https://reviews.llvm.org/D61178

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359294 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 10:56:10 +00:00
Simon Pilgrim
cc6487ed56 [X86][SSE] Disable shouldFoldConstantShiftPairToMask for btver1/btver2 targets (PR40758)
As detailed on PR40758, Bobcat/Jaguar can perform vector immediate shifts on the same pipes as vector ANDs with the same latency - so it doesn't make sense to replace a shl+lshr with a shift+and pair as it requires an additional mask (with the extra constant pool, loading and register pressure costs).

Differential Revision: https://reviews.llvm.org/D61068

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359293 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 10:49:13 +00:00
Simon Pilgrim
8a0d120e52 [X86][AVX] Combine shuffles extracted from a common vector
A small step towards combining shuffles across vector sizes - this recognizes when a shuffle's operands are all extracted from the same larger source and tries to combine to an unary shuffle of that source instead. Fixes one of the test cases from PR34380.

Differential Revision: https://reviews.llvm.org/D60512

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359292 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 09:56:14 +00:00
Sven van Haastregt
75b3428a2d [InferAddressSpaces] Add AS parameter to the pass factory
This enables the pass to be used in the absence of
TargetTransformInfo. When the argument isn't passed, the factory
defaults to UninitializedAddressSpace and the flat address space is
obtained from the TargetTransformInfo as before this change. Existing
users won't have to change.

Patch by Kevin Petit.

Differential Revision: https://reviews.llvm.org/D60602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359290 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 09:21:25 +00:00
Hans Wennborg
d51e703994 Fix alignment in AArch64InstructionSelector::emitConstantPoolEntry()
The code was using the alignment of a pointer to the value, not the
alignment of the constant itself.

Maybe we got away with it so far because the pointer alignment is
fairly high, but we did end up under-aligning <16 x i8> vectors,
which was caught in the Chromium build after lld stopped over-aligning
the .rodata.cst16 section in r356428. (See crbug.com/953815)

Differential revision: https://reviews.llvm.org/D61124

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359287 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 08:31:00 +00:00
Marcello Maggioni
3ab1cc18bb [GlobalISel] Fix inserting copies in the right position for reg definitions
When constrainRegClass is called if the constraining happens on a use the COPY
needs to be inserted before the instruction that contains the MachineOperand,
but if we are constraining a definition it actually needs to be added
after the instruction. In addition, the COPY needs to have its operands
flipped (in the use case we are copying from the old unconstrained register
to the new constrained register, while in the definition case we are copying
from the new constrained register that the instruction defines to the old
unconstrained register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359282 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 07:21:56 +00:00
Fangrui Song
81503f15ae Fix typos: (re)?sor?uce -> (re)?source
Closes: https://github.com/llvm/llvm-project/pull/10

In-collaboration-with:	Olivier Cochard-Labbé <olivier@FreeBSD.org>
Signed-off-by: Enji Cooper <yaneurabeya@gmail.com>

Differential Revision: https://reviews.llvm.org/D61021

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359277 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 05:56:23 +00:00
Dan Robertson
15ec533129 [NFC] Add baseline tests for int isKnownNonZero
Add baseline tests for improvements of isKnownNonZero for integer types.

Differential Revision: https://reviews.llvm.org/D60932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359267 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 02:55:54 +00:00
Fangrui Song
f0d90ddef5 [llvm-objcopy] Accept --long-option but not -long-option
Summary:

llvm-{objcopy,strip} (and many other LLVM binary utilities) accept
cl::opt style -long-option as well as many short options (e.g. -p -S
-x). People who use them as replacement of GNU binutils often use the
grouped option syntax (POSIX Utility Conventions), e.g. -Sx => -S -x,
-Wd => -W -d, -sj.text => -s -j.text

There is ambiguity if a long option starts with the character used by a
short option. Drop the support for -long-option to resolve the ambiguity.

This divergence from other utilities is accepted (other utilities
continue supporting -long-option).
https://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html

Reviewers: alexshap, jakehehrlich, jhenderson, rupprecht, espindola

Reviewed By: jakehehrlich, jhenderson, rupprecht

Subscribers: grimar, emaste, arichardson, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60439

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359265 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 02:10:10 +00:00
Justin Bogner
baf32fac2b [GlobalOpt] Swap the expensive check for cold calls with the cheap TTI check
isValidCandidateForColdCC is much more expensive than
TTI.useColdCCForColdCall, which by default just returns false. Avoid
doing this work if we're not going to look at the answer anyway.

This change is NFC, but I see significant compile time improvements on
some code with pathologically many functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359253 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-26 00:12:50 +00:00
Lang Hames
79fafc77f9 [ORC] Remove symbols from dependency lists when failing materialization.
When failing materialization of a symbol X, remove X from the dependants list
of any of X's dependencies. This ensures that when X's dependencies are
emitted (or fail themselves) they do not try to access the no-longer-existing
MaterializationInfo for X.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359252 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 23:31:33 +00:00
Artem Belevich
03f06f0ea6 [CUDA] Implemented _[bi]mma* builtins.
These builtins provide access to the new integer and
sub-integer variants of MMA (matrix multiply-accumulate) instructions
provided by CUDA-10.x on sm_75 (AKA Turing) GPUs.

Also added a feature for PTX 6.4. While Clang/LLVM does not generate
any PTX instructions that need it, we still need to pass it through to
ptxas in order to be able to compile code that uses the new 'mma'
instruction as inline assembly (e.g used by NVIDIA's CUTLASS library
https://github.com/NVIDIA/cutlass/blob/master/cutlass/arch/mma.h#L101)

Differential Revision: https://reviews.llvm.org/D60279

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359248 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 22:28:09 +00:00
Artem Belevich
9e3c94a04c PTX 6.3 extends wmma instruction to support s8/u8/s4/u4/b1 -> s32.
All of the new instructions are still handled mostly by tablegen. I've slightly
refactored the code to drive intrinsic/instruction generation from a master
list of supported variants, so all irregularities have to be implemented in one place only.

The test generation script wmma.py has been refactored in a similar way.

Differential Revision: https://reviews.llvm.org/D60015

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359247 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 22:27:57 +00:00
Artem Belevich
5446c675c4 [NVPTX] generate correct MMA instruction mnemonics with PTX63+.
PTX 6.3 requires using ".aligned" in the MMA instruction names.
In order to generate correct name, now we pass current
PTX version to each instruction as an extra constant operand
and InstPrinter adjusts its output accordingly.

Differential Revision: https://reviews.llvm.org/D59393

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359246 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 22:27:46 +00:00
Artem Belevich
5100f1a2e0 [NVPTX] Refactor generation of MMA intrinsics and instructions. NFC.
Generalized constructions of 'fragments' of MMA operations to provide
common primitives for construction of the ops. This will make it easier
to add new variants of the instructions that operate on integer types.

Use nested foreach loops which makes it possible to better control
naming of the intrinsics.

This patch does not affect LLVM's output, so there are no test changes.

Differential Revision: https://reviews.llvm.org/D59389

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359245 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 22:27:35 +00:00
Sean Fertile
2dd904abdb [Object][XCOFF] Add intial support for section header table.
Adds a representation of the section header table to XCOFFObjectFile,
and implements enough to dump the section headers with llvm-obdump.

Differential Revision: https://reviews.llvm.org/D60784

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359244 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 21:36:04 +00:00
Keno Fischer
8d8655b728 [CMake][PowerPC] Recognize LLVM_NATIVE_TARGET="ppc64le" as PowerPC
Summary:
This value is derived from the host triple, which on the machine
I'm currently using is `ppc64le-linux-redhat`. This change makes
LLVM compile.

Reviewers: nemanjai
Differential Revision: https://reviews.llvm.org/D57118

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359242 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 21:28:03 +00:00
Stanislav Mekhanoshin
334c00d184 [AMDGPU] gfx1010 - fix ubsan failure
Revert DecoderNamespace in one place for now. It will need more
changes to properly work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359239 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 20:39:06 +00:00
Sanjay Patel
8f63d03e3a [x86] add tests for vector fdiv reciprocal estimate; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359238 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 20:35:47 +00:00
David Blaikie
434bbb1a68 Assigning to a local object in a return statement prevents copy elision. NFC.
I added a diagnostic along the lines of `-Wpessimizing-move` to detect `return x = y` suppressing copy elision, but I don't know if the diagnostic is really worth it. Anyway, here are the places where my diagnostic reported that copy elision would have been possible if not for the assignment.

P1155R1 in the post-San-Diego WG21 (C++ committee) mailing discusses whether WG21 should fix this pitfall by just changing the core language to permit copy elision in cases like these.

(Kona update: The bulk of P1155 is proceeding to CWG review, but specifically *not* the parts that explored the notion of permitting copy-elision in these specific cases.)

Reviewed By: dblaikie

Author: Arthur O'Dwyer

Differential Revision: https://reviews.llvm.org/D54885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359236 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 20:09:00 +00:00
Jessica Paquette
9629553b79 [GlobalISel][AArch64] Make G_EXTRACT_VECTOR_ELT legal for v8s16s
This case was missing before, so we couldn't legalize it.

Add it to AArch64LegalizerInfo.cpp and update select-extract-vector-elt.mir.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359231 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 20:00:57 +00:00
Akira Hatanaka
85656d2bc3 [ObjC][ARC] Let ARC optimizer bail out if the number of pointer states
it keeps track of becomes too large

ARC optimizer does a top-down and a bottom-up traversal of the whole
function to pair up retain and release instructions and remove them.
This can be expensive if the number of instructions in the function and
pointer states it tracks are large since it has to look at each pointer
state and determine whether the instruction being visited can
potentially use the pointer.

This patch adds a command line option that sets a limit to the number of
pointers it tracks.

rdar://problem/49477063

Differential Revision: https://reviews.llvm.org/D61100

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359226 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 19:42:55 +00:00
Stanislav Mekhanoshin
85430e7ae4 [AMDGPU] gfx1010 VOP1 instructions
Differential Revision: https://reviews.llvm.org/D61099

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359225 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 19:01:51 +00:00
Stanislav Mekhanoshin
6ae9485eb1 [AMDGPU] gfx1010 utility functions
Differential Revision: https://reviews.llvm.org/D61094

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359224 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 18:53:41 +00:00
Jessica Paquette
194fea7ca5 [GlobalISel][AArch64] Add generic legalization rule for extends
This adds a legalization rule for G_ZEXT, G_ANYEXT, and G_SEXT which allows
extends whenever the types will fit in registers (or the source is an s1).

Update tests. Add GISel checks throughout all of arm64-vabs.ll,
where we now select a good portion of the code. Add GISel checks to
arm64-subvector-extend.ll, which has a good number of vector extends in it.

Differential Revision: https://reviews.llvm.org/D60889

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359222 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 18:42:00 +00:00
Craig Topper
2d0f20640c [SelectionDAG][X86] Use stack load/store in PromoteIntRes_BITCAST when the input needs to be be split and the output type is a vector.
We had special case handling here, but it uses a scalar any_extend for the
promotion then bitcasts to the final type. This won't split up the input data
into multiple promoted elements like we need.

This patch falls back to doing the conversion through memory.

Fixes PR41594 which I believe was reflected in the bitcast-vector-bool.ll
changes. The changes to vector-half-conversions.ll are fixing a previously
unknown miscompile from this issue.

Differential Revision: https://reviews.llvm.org/D61114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359219 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 18:19:59 +00:00
Robert Lougher
e5a6b5fca2 [Evaluator] Walk initial elements when handling load through bitcast
When evaluating a store through a bitcast, the evaluator tries to move the
bitcast from the pointer onto the stored value. If the cast is invalid, it
tries to "introspect" the type to get a valid cast by obtaining a pointer to
the initial element (if the type is nested, this may require walking several
initial elements).

In some situations it is possible to get a bitcast on a load (e.g. with
unions, where the bitcast may not be the same type as the store). However,
equivalent logic to the store to introspect the type is missing. This patch
add this logic.

Note, when developing the patch I was unhappy with adding similar logic
directly to the load case as it could get out of step. Instead, I have
abstracted the "introspection" into a helper function, with the specifics
being handled by a passed-in lambda function.

Differential Revision: https://reviews.llvm.org/D60793



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359205 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 17:00:01 +00:00
Jessica Paquette
e6dbec3d99 [GlobalISel][AArch64] Legalize G_FNEARBYINT
Add legalizer support for G_FNEARBYINT. It's the same as G_FCEIL etc.

Since the importer allows us to automatically select this after legalization,
also add tests for selection etc. Also update arm64-vfloatintrinsics.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359204 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 16:44:40 +00:00
Jessica Paquette
f702279be5 [GlobalISel] Add IRTranslator support for G_FNEARBYINT
Translate llvm.nearbyint into G_FNEARBYINT as a simple intrinsic. Update
arm64-irtranslator.ll.

Differential Revision: https://reviews.llvm.org/D60922

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359203 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 16:39:28 +00:00
Jessica Paquette
e0dc647b6b [GlobalISel] Add a G_FNEARBYINT opcode
For eventually selecting llvm.nearbyint. Equivalent to the SelectionDAG
nearbyint node.

Update legalizer-info-validation.mir.

Differential Revision: https://reviews.llvm.org/D60921

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359201 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 16:36:03 +00:00
Lang Hames
205ee18e7b Revert "[JITLink] Make the JITLink MachO/x86-64 eh-frame test work on Windows."
This reverts r359169, as it broke one of the windows bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359198 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 15:18:31 +00:00
Nico Weber
b750e53294 gn build: Document llvm_enable_dia_sdk variable better
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359196 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 14:56:56 +00:00
Nico Weber
02e74daab3 gn build: Make setting llvm_enable_dia_sdk=true work
If this is set, %INCLUDE% must contain ".../DIA SDK/include"
and %LIB% must contain ".../DIA SKD/lib/amd64" (assuming you're doing a
64-bit build).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359195 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 14:53:53 +00:00
Simon Pilgrim
9801d57f94 [InstCombine][X86] Tweak generic expansion of PACKSS/PACKUS to shuffle then truncate. NFCI.
This has no effect on constant folding but will be useful when we expand non-saturating PACKSS/PACKUS intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359191 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 13:51:57 +00:00
Sam McCall
cce940f610 [Support] json::OStream::flush(), which passes through to the underlying stream
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359190 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 13:33:18 +00:00
Nico Weber
9be5d08cda gn build: Merge r359179
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359189 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 13:29:34 +00:00
Nico Weber
3785277ee4 gn build: Merge r359174
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359188 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 13:26:54 +00:00
Nico Weber
f1bbf582c4 gn build: Merge r359142
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359187 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 13:25:00 +00:00
Sam McCall
2802669519 [Support] Add JSON streaming output API, faster where the heavy value types aren't needed.
Summary:
There's still a little bit of constant factor that could be trimmed (e.g.
more overloads to avoid round-tripping primitives through json::Value).
But this solves the memory scaling problem, and greatly improves the performance
constant factor, and the API should leave room for optimization if needed.

Adapt TimeProfiler to use it, eliminating almost all the performance regression
from r358476.

Performance test on my machine:
perf stat -r 5 ~/llvmbuild-opt/bin/clang++ -w -S -ftime-trace -mllvm -time-trace-granularity=0 spirit.cpp

Handcrafted JSON (HEAD=r358532 with r358476 reverted): 2480ms
json::Value (HEAD): 2757ms (+11%)
After this patch: 2520 ms (+1.6%)

Reviewers: anton-afanasyev, lebedev.ri

Subscribers: kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60804

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359186 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 12:51:42 +00:00
Simon Pilgrim
50b4f7f516 [InstCombine][X86] Add PACKSS/PACKUS tests for truncation where saturation won't occur
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359185 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 12:45:11 +00:00
Ilya Biryukov
4bc5e93aac [Support] Try to unbreak windows buildbot
After r359179.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359183 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 11:57:40 +00:00
Fangrui Song
8e834b5cde Parallel: only allow the first TaskGroup to run tasks parallelly
Summary:
Concurrent (e.g. nested) llvm::parallel::for_each() may lead to dead
locks. See PR35788 (fixed by rLLD322041) and PR41508 (fixed by D60757).

When parallel_for_each() is about to return, in ~Latch() called by
~TaskGroup(), a thread (in the default executor) may block in
Latch::sync() waiting for Count to become zero. If all threads in the
default executor are blocked, it is a dead lock.

To fix this, force serial execution if the current TaskGroup is not the
first one. For a nested llvm::parallel::for_each(), this parallelizes
the outermost loop and serializes inner loops.

Differential Revision: https://reviews.llvm.org/D61115

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359182 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 11:33:30 +00:00
Fangrui Song
777fdf4844 [llvm-objdump] Prep for adding newlines before and after "Disassembly of section ...:"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359181 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 10:25:52 +00:00
Florian Hahn
32986d30ff [ConstantRange] [a, b) udiv a full range is [0, umax(b)).
Reviewers: nikic, spatel, efriedma

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D60536

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359180 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 10:12:43 +00:00
Ilya Biryukov
497e112ae7 [Testing] Move clangd::Annotations to llvm testing support
Summary:
Annotations allow writing nice-looking unit test code when one needs
access to locations from the source code, e.g. running code completion
at particular offsets in a file. See comments in Annotations.cpp for
more details on the API.

Also got rid of a duplicate annotations parsing code in clang's code
complete tests.

Reviewers: gribozavr, sammccall

Reviewed By: gribozavr

Subscribers: mgorny, hiraditya, ioeric, MaskRay, jkorous, arphaman, kadircet, jdoerfert, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D59814

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359179 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-25 10:08:31 +00:00