mirror of
https://github.com/RPCS3/llvm.git
synced 2026-08-27 21:00:01 -04:00
Nirav Dave
df002d74e3
Summary: Extend analysis forwarding loads from preceeding stores to work with extended loads and truncated stores to the same address so long as the load is fully subsumed by the store. Hexagon's swp-epilog-phis.ll and swp-memrefs-epilog1.ll test are deleted as they've no longer seem to be relevant. Reviewers: RKSimon, rnk, kparzysz, javed.absar Subscribers: sdardis, nemanjai, hiraditya, atanasyan, llvm-commits Differential Revision: https://reviews.llvm.org/D49200 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344142 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
963 B
LLVM
26 lines
963 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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define void @pr32108() {
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; CHECK-LABEL: pr32108:
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; CHECK: # %bb.0: # %BB
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: .LBB0_1: # %CF244
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: jmp .LBB0_1
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BB:
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%Cmp45 = icmp slt <4 x i32> undef, undef
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br label %CF243
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CF243: ; preds = %CF243, %BB
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br i1 undef, label %CF243, label %CF257
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CF257: ; preds = %CF243
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%Shuff144 = shufflevector <4 x i1> undef, <4 x i1> %Cmp45, <4 x i32> <i32 undef, i32 undef, i32 5, i32 undef>
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br label %CF244
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CF244: ; preds = %CF244, %CF257
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%Shuff182 = shufflevector <4 x i1> %Shuff144, <4 x i1> zeroinitializer, <4 x i32> <i32 3, i32 5, i32 7, i32 undef>
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br label %CF244
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}
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