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https://github.com/RPCS3/llvm.git
synced 2026-08-27 02:51:23 -04:00
Craig Topper
b6ab93e6a5
This patch enables combining integer bitcasts of integer build vectors when the new scalar type is legal. I've avoided floating point because the implementation bitcasts float to int along the way and we would need to check the intermediate types for legality Differential Revision: https://reviews.llvm.org/D58884 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355324 91177308-0d34-0410-b5e6-96231b3b80d8
88 lines
2.3 KiB
LLVM
88 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -relocation-model=static -mtriple=i686-unknown -mattr=+mmx,+sse3 | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -relocation-model=static -mtriple=x86_64-unknown -mattr=+mmx,+sse3 | FileCheck %s --check-prefix=X64
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; 64-bit stores here do not use MMX.
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@M1 = external global <1 x i64>
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@M2 = external global <2 x i32>
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@S1 = external global <2 x i64>
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@S2 = external global <4 x i32>
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define void @test1() {
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; X32-LABEL: test1:
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; X32: # %bb.0:
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; X32-NEXT: movl $0, M1+4
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; X32-NEXT: movl $0, M1
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; X32-NEXT: xorps %xmm0, %xmm0
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; X32-NEXT: movlps %xmm0, M2
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; X32-NEXT: retl
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;
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; X64-LABEL: test1:
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; X64: # %bb.0:
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; X64-NEXT: movq $0, {{.*}}(%rip)
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; X64-NEXT: movq $0, {{.*}}(%rip)
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; X64-NEXT: retq
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store <1 x i64> zeroinitializer, <1 x i64>* @M1
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store <2 x i32> zeroinitializer, <2 x i32>* @M2
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ret void
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}
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define void @test2() {
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; X32-LABEL: test2:
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; X32: # %bb.0:
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; X32-NEXT: movl $-1, M1+4
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; X32-NEXT: movl $-1, M1
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; X32-NEXT: pcmpeqd %xmm0, %xmm0
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; X32-NEXT: movq %xmm0, M2
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; X32-NEXT: retl
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;
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; X64-LABEL: test2:
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; X64: # %bb.0:
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; X64-NEXT: movq $-1, {{.*}}(%rip)
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; X64-NEXT: movq $-1, {{.*}}(%rip)
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; X64-NEXT: retq
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store <1 x i64> < i64 -1 >, <1 x i64>* @M1
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store <2 x i32> < i32 -1, i32 -1 >, <2 x i32>* @M2
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ret void
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}
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define void @test3() {
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; X32-LABEL: test3:
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; X32: # %bb.0:
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; X32-NEXT: xorps %xmm0, %xmm0
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; X32-NEXT: movaps %xmm0, S1
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; X32-NEXT: movaps %xmm0, S2
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; X32-NEXT: retl
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;
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; X64-LABEL: test3:
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; X64: # %bb.0:
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
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; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
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; X64-NEXT: retq
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store <2 x i64> zeroinitializer, <2 x i64>* @S1
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store <4 x i32> zeroinitializer, <4 x i32>* @S2
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ret void
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}
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define void @test4() {
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; X32-LABEL: test4:
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; X32: # %bb.0:
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; X32-NEXT: pcmpeqd %xmm0, %xmm0
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; X32-NEXT: movdqa %xmm0, S1
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; X32-NEXT: movdqa %xmm0, S2
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; X32-NEXT: retl
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;
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; X64-LABEL: test4:
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; X64: # %bb.0:
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; X64-NEXT: pcmpeqd %xmm0, %xmm0
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; X64-NEXT: movdqa %xmm0, {{.*}}(%rip)
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; X64-NEXT: movdqa %xmm0, {{.*}}(%rip)
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; X64-NEXT: retq
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store <2 x i64> < i64 -1, i64 -1>, <2 x i64>* @S1
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store <4 x i32> < i32 -1, i32 -1, i32 -1, i32 -1 >, <4 x i32>* @S2
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ret void
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}
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