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12df467aac
If the arch is P8, we will select XFLOAD to load the floating point, and then, expand it to vsx and non-vsx X-form instruction post RA. This patch is trying to convert the X-form to D-form if it meets the requirement that one operand of the x-form inst is the special Zero register, and another operand fed by add inst. i.e. y = add imm, reg LFDX. 0, y --> LFD imm(reg) Reviewers: Nemanjai Differential Revision: https://reviews.llvm.org/D49007 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340149 91177308-0d34-0410-b5e6-96231b3b80d8
107 lines
4.4 KiB
LLVM
107 lines
4.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 <%s | FileCheck -check-prefix=CHECK-P9 %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 <%s | FileCheck -check-prefix=CHECK-P8 %s
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; As the constant could be represented as float, a float is
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; loaded from constant pool.
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define double @doubleConstant1() {
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ret double 1.400000e+01
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; CHECK-LABEL: doubleConstant1:
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; CHECK-P9: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P9: lfs {{[0-9]+}}, [[VAR]]@toc@l([[REG1]])
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; CHECK-P8: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P8: lfs {{[0-9]+}}, [[VAR]]@toc@l([[REG1]])
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}
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; As the constant couldn't be represented as float, a double is
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; loaded from constant pool.
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define double @doubleConstant2() {
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ret double 2.408904e+01
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; CHECK-LABEL: doubleConstant2:
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; CHECK-P9: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P9: lfd {{[0-9]+}}, [[VAR]]@toc@l([[REG1]])
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; CHECK-P8: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P8: lfd {{[0-9]+}}, [[VAR]]@toc@l([[REG1]])
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}
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@FArr = hidden local_unnamed_addr global [10 x float] zeroinitializer, align 4
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define float @floatConstantArray() local_unnamed_addr {
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%1 = load float, float* getelementptr inbounds ([10 x float], [10 x float]* @FArr, i64 0, i64 3), align 4
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%2 = fadd float %1, 0x400B333340000000
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ret float %2
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; CHECK-LABEL: floatConstantArray
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; CHECK-P9: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha+[[REG2:[0-9]+]]
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; CHECK-P9: lfs {{[0-9]+}}, [[VAR]]@toc@l+[[REG2]]([[REG1]])
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; CHECK-P8: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P8: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l
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; CHECK-P8: lfs {{[0-9]+}}, 12([[REG2]])
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}
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define float @floatConstant() {
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ret float 0x400470A3E0000000
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; CHECK-LABEL: floatConstant:
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; CHECK-P9: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P9: lfs {{[0-9]+}}, [[VAR]]@toc@l([[REG1]])
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; CHECK-P8: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P8: lfs {{[0-9]+}}, [[VAR]]@toc@l([[REG1]])
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}
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; llvm put the hidden globals into the TOC table.
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; TODO - do some analysis and decide which globals could be put into TOC.
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@d = hidden local_unnamed_addr global [200 x double] zeroinitializer, align 8
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define double @doubleConstantArray() {
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%1 = load double, double* getelementptr inbounds ([200 x double], [200 x double]* @d, i64 0, i64 3), align 8
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%2 = fadd double %1, 6.880000e+00
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ret double %2
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; CHECK-LABEL: doubleConstantArray
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; CHECK-P9: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha+[[REG2:[0-9]+]]
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; CHECK-P9: lfd {{[0-9]+}}, [[VAR]]@toc@l+[[REG2]]([[REG1]])
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; CHECK-P8: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P8: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l
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; CHECK-P8: lfd {{[0-9]+}}, 24([[REG2]])
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}
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@arr = hidden local_unnamed_addr global [20000 x double] zeroinitializer, align 8
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define double @doubleLargeConstantArray() {
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%1 = load double, double* getelementptr inbounds ([20000 x double], [20000 x double]* @arr, i64 0, i64 4096), align 8
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%2 = fadd double %1, 6.880000e+00
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ret double %2
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; Access an element with an offset that doesn't fit in the displacement field of LFD.
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; CHECK-LABEL: doubleLargeConstantArray
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; CHECK-P9: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P9: li [[REG2:[0-9]+]], 0
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; CHECK-P9: addi [[REG3:[0-9]+]], [[REG1]], [[VAR:[a-z0-9A-Z_.]+]]@toc@l
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; CHECK-P9: ori [[REG4:[0-9]+]], [[REG2]], 32768
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; CHECK-P9: lfdx {{[0-9]+}}, [[REG3]], [[REG4]]
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; CHECK-P8: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P8: li [[REG2:[0-9]+]], 0
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; CHECK-P8: addi [[REG3:[0-9]+]], [[REG1]], [[VAR:[a-z0-9A-Z_.]+]]@toc@l
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; CHECK-P8: ori [[REG4:[0-9]+]], [[REG2]], 32768
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; CHECK-P8: lfdx {{[0-9]+}}, [[REG3]], [[REG4]]
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}
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@vec_arr = global [10 x <4 x i32>] zeroinitializer, align 16
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define <4 x i32> @vectorArray() #0 {
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entry:
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%0 = load <4 x i32>, <4 x i32>* getelementptr inbounds ([10 x <4 x i32>], [10 x <4 x i32>]* @vec_arr, i64 0, i64 2), align 16
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ret <4 x i32> %0
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; CHECK-LABEL: vectorArray
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; CHECK-P9: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P9: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]])
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; CHECK-P9: lxv {{[0-9]+}}, 32([[REG2]])
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; CHECK-P8: addis [[REG1:[0-9]+]], 2, [[VAR:[a-z0-9A-Z_.]+]]@toc@ha
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; CHECK-P8: ld [[REG2:[0-9]+]], [[VAR]]@toc@l([[REG1]])
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; CHECK-P8: addi [[REG3:[0-9]+]], [[REG2]], 32
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; CHECK-P8: lvx {{[0-9]+}}, 0, [[REG3]]
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}
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