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Summary: The GR740 provides an up cycle counter in the registers ASR22 and ASR23. As these registers can not be read together atomically we only use the value of ASR23 for llvm.readcyclecounter(). The ASR23 register holds the 32 LSBs of the up-counter. Reviewers: jyknight, venkatra Reviewed By: jyknight Subscribers: jfb, fedor.sergeev, jrtc27, llvm-commits Differential Revision: https://reviews.llvm.org/D48638 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340733 91177308-0d34-0410-b5e6-96231b3b80d8
12 lines
247 B
LLVM
12 lines
247 B
LLVM
; RUN: llc < %s -march=sparc -mcpu=gr740 -verify-machineinstrs | FileCheck %s
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; CHECK: rd %asr23, %o1
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; CHECK: mov %g0, %o0
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define i64 @test() {
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entry:
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%0 = call i64 @llvm.readcyclecounter()
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ret i64 %0
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}
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declare i64 @llvm.readcyclecounter()
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