mirror of
https://github.com/RPCS3/llvm.git
synced 2025-05-16 18:35:53 +00:00
a26aa42625
Summary: Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits, jfb Differential Revision: https://reviews.llvm.org/D51241 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340750 91177308-0d34-0410-b5e6-96231b3b80d8
389 lines
10 KiB
LLVM
389 lines
10 KiB
LLVM
; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
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; Test loads and stores with custom alignment values.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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;===----------------------------------------------------------------------------
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; Loads
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;===----------------------------------------------------------------------------
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; CHECK-LABEL: ldi64_a1:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi64_a1(i64 *%p) {
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%v = load i64, i64* %p, align 1
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ret i64 %v
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}
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; CHECK-LABEL: ldi64_a2:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi64_a2(i64 *%p) {
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%v = load i64, i64* %p, align 2
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ret i64 %v
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}
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; CHECK-LABEL: ldi64_a4:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0):p2align=2{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi64_a4(i64 *%p) {
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%v = load i64, i64* %p, align 4
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ret i64 %v
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}
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; 8 is the default alignment for i64 so no attribute is needed.
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; CHECK-LABEL: ldi64_a8:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi64_a8(i64 *%p) {
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%v = load i64, i64* %p, align 8
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ret i64 %v
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}
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; The default alignment in LLVM is the same as the defualt alignment in wasm.
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; CHECK-LABEL: ldi64:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi64(i64 *%p) {
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%v = load i64, i64* %p
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ret i64 %v
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}
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; 16 is greater than the default alignment so it is ignored.
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; CHECK-LABEL: ldi64_a16:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi64_a16(i64 *%p) {
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%v = load i64, i64* %p, align 16
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ret i64 %v
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}
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;===----------------------------------------------------------------------------
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; Extending loads
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;===----------------------------------------------------------------------------
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; CHECK-LABEL: ldi8_a1:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi8_a1(i8 *%p) {
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%v = load i8, i8* %p, align 1
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%w = zext i8 %v to i64
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ret i64 %w
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}
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; CHECK-LABEL: ldi8_a2:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load8_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi8_a2(i8 *%p) {
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%v = load i8, i8* %p, align 2
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%w = zext i8 %v to i64
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ret i64 %w
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}
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; CHECK-LABEL: ldi16_a1:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi16_a1(i16 *%p) {
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%v = load i16, i16* %p, align 1
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%w = zext i16 %v to i64
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ret i64 %w
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}
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; CHECK-LABEL: ldi16_a2:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi16_a2(i16 *%p) {
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%v = load i16, i16* %p, align 2
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%w = zext i16 %v to i64
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ret i64 %w
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}
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; CHECK-LABEL: ldi16_a4:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load16_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi16_a4(i16 *%p) {
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%v = load i16, i16* %p, align 4
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%w = zext i16 %v to i64
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ret i64 %w
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}
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; CHECK-LABEL: ldi32_a1:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0):p2align=0{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi32_a1(i32 *%p) {
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%v = load i32, i32* %p, align 1
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%w = zext i32 %v to i64
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ret i64 %w
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}
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; CHECK-LABEL: ldi32_a2:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0):p2align=1{{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi32_a2(i32 *%p) {
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%v = load i32, i32* %p, align 2
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%w = zext i32 %v to i64
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ret i64 %w
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}
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; CHECK-LABEL: ldi32_a4:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi32_a4(i32 *%p) {
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%v = load i32, i32* %p, align 4
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%w = zext i32 %v to i64
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ret i64 %w
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}
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; CHECK-LABEL: ldi32_a8:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.load32_u $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi32_a8(i32 *%p) {
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%v = load i32, i32* %p, align 8
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%w = zext i32 %v to i64
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ret i64 %w
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}
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;===----------------------------------------------------------------------------
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; Stores
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;===----------------------------------------------------------------------------
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; CHECK-LABEL: sti64_a1:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store 0($0):p2align=0, $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti64_a1(i64 *%p, i64 %v) {
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store i64 %v, i64* %p, align 1
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ret void
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}
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; CHECK-LABEL: sti64_a2:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store 0($0):p2align=1, $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti64_a2(i64 *%p, i64 %v) {
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store i64 %v, i64* %p, align 2
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ret void
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}
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; CHECK-LABEL: sti64_a4:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store 0($0):p2align=2, $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti64_a4(i64 *%p, i64 %v) {
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store i64 %v, i64* %p, align 4
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ret void
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}
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; 8 is the default alignment for i32 so no attribute is needed.
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; CHECK-LABEL: sti64_a8:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti64_a8(i64 *%p, i64 %v) {
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store i64 %v, i64* %p, align 8
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ret void
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}
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; The default alignment in LLVM is the same as the defualt alignment in wasm.
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; CHECK-LABEL: sti64:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti64(i64 *%p, i64 %v) {
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store i64 %v, i64* %p
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ret void
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}
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; CHECK-LABEL: sti64_a16:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti64_a16(i64 *%p, i64 %v) {
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store i64 %v, i64* %p, align 16
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ret void
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}
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;===----------------------------------------------------------------------------
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; Truncating stores
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;===----------------------------------------------------------------------------
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; CHECK-LABEL: sti8_a1:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store8 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti8_a1(i8 *%p, i64 %w) {
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%v = trunc i64 %w to i8
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store i8 %v, i8* %p, align 1
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ret void
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}
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; CHECK-LABEL: sti8_a2:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store8 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti8_a2(i8 *%p, i64 %w) {
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%v = trunc i64 %w to i8
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store i8 %v, i8* %p, align 2
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ret void
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}
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; CHECK-LABEL: sti16_a1:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store16 0($0):p2align=0, $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti16_a1(i16 *%p, i64 %w) {
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%v = trunc i64 %w to i16
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store i16 %v, i16* %p, align 1
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ret void
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}
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; CHECK-LABEL: sti16_a2:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store16 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti16_a2(i16 *%p, i64 %w) {
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%v = trunc i64 %w to i16
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store i16 %v, i16* %p, align 2
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ret void
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}
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; CHECK-LABEL: sti16_a4:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store16 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti16_a4(i16 *%p, i64 %w) {
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%v = trunc i64 %w to i16
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store i16 %v, i16* %p, align 4
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ret void
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}
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; CHECK-LABEL: sti32_a1:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store32 0($0):p2align=0, $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32_a1(i32 *%p, i64 %w) {
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%v = trunc i64 %w to i32
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store i32 %v, i32* %p, align 1
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ret void
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}
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; CHECK-LABEL: sti32_a2:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store32 0($0):p2align=1, $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32_a2(i32 *%p, i64 %w) {
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%v = trunc i64 %w to i32
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store i32 %v, i32* %p, align 2
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ret void
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}
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; CHECK-LABEL: sti32_a4:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store32 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32_a4(i32 *%p, i64 %w) {
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%v = trunc i64 %w to i32
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store i32 %v, i32* %p, align 4
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ret void
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}
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; CHECK-LABEL: sti32_a8:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.store32 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti32_a8(i32 *%p, i64 %w) {
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%v = trunc i64 %w to i32
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store i32 %v, i32* %p, align 8
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ret void
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}
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;===----------------------------------------------------------------------------
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; Atomic loads
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;===----------------------------------------------------------------------------
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; Wasm atomics have the alignment field, but it must always have the type's
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; natural alignment.
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; CHECK-LABEL: ldi64_atomic_a8:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi64_atomic_a8(i64 *%p) {
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%v = load atomic i64, i64* %p seq_cst, align 8
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ret i64 %v
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}
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; 16 is greater than the default alignment so it is ignored.
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; CHECK-LABEL: ldi64_atomic_a16:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: i64.atomic.load $push[[NUM:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: return $pop[[NUM]]{{$}}
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define i64 @ldi64_atomic_a16(i64 *%p) {
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%v = load atomic i64, i64* %p seq_cst, align 16
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ret i64 %v
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}
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;===----------------------------------------------------------------------------
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; Atomic stores
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;===----------------------------------------------------------------------------
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; CHECK-LABEL: sti64_atomic_a4:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti64_atomic_a4(i64 *%p, i64 %v) {
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store atomic i64 %v, i64* %p seq_cst, align 8
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ret void
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}
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; 16 is greater than the default alignment so it is ignored.
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; CHECK-LABEL: sti64_atomic_a8:
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; CHECK-NEXT: .param i32, i64{{$}}
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; CHECK-NEXT: i64.atomic.store 0($0), $1{{$}}
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; CHECK-NEXT: return{{$}}
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define void @sti64_atomic_a8(i64 *%p, i64 %v) {
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store atomic i64 %v, i64* %p seq_cst, align 16
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ret void
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}
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