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f56ec7c112
Summary:
rL341389 broke code with tied register operands in inline assembly. For
example, `asm("" : "=r"(var) : "0"(var));`
The code above specifies the input operand to be in the same register
with the output operand, tying the two register. This patch makes this
kind of code work again.
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, eraman, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51991
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342084 91177308-0d34-0410-b5e6-96231b3b80d8
114 lines
3.3 KiB
LLVM
114 lines
3.3 KiB
LLVM
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -no-integrated-as -verify-machineinstrs | FileCheck %s
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; Test basic inline assembly. Pass -no-integrated-as since these aren't
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; actually valid assembly syntax.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: foo:
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; CHECK-NEXT: .param i32{{$}}
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: #APP{{$}}
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; CHECK-NEXT: # 0 = aaa(0){{$}}
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; CHECK-NEXT: #NO_APP{{$}}
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; CHECK-NEXT: get_local $push0=, 0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @foo(i32 %r) {
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entry:
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%0 = tail call i32 asm sideeffect "# $0 = aaa($1)", "=r,r"(i32 %r) #0, !srcloc !0
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ret i32 %0
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}
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; CHECK-LABEL: imm:
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; CHECK-NEXT: .result i32{{$}}
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; CHECK-NEXT: .local i32{{$}}
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; CHECK-NEXT: #APP{{$}}
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; CHECK-NEXT: # 0 = ccc(42){{$}}
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; CHECK-NEXT: #NO_APP{{$}}
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; CHECK-NEXT: get_local $push0=, 0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @imm() {
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entry:
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%0 = tail call i32 asm sideeffect "# $0 = ccc($1)", "=r,i"(i32 42) #0, !srcloc !2
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ret i32 %0
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}
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; CHECK-LABEL: foo_i64:
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; CHECK-NEXT: .param i64{{$}}
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; CHECK-NEXT: .result i64{{$}}
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; CHECK-NEXT: #APP{{$}}
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; CHECK-NEXT: # 0 = aaa(0){{$}}
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; CHECK-NEXT: #NO_APP{{$}}
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; CHECK-NEXT: get_local $push0=, 0{{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @foo_i64(i64 %r) {
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entry:
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%0 = tail call i64 asm sideeffect "# $0 = aaa($1)", "=r,r"(i64 %r) #0, !srcloc !0
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ret i64 %0
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}
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; CHECK-LABEL: X_i16:
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; CHECK: foo 1{{$}}
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; CHECK: get_local $push[[S0:[0-9]+]]=, 0{{$}}
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; CHECK-NEXT: get_local $push[[S1:[0-9]+]]=, 1{{$}}
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; CHECK-NEXT: i32.store16 0($pop[[S0]]), $pop[[S1]]{{$}}
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define void @X_i16(i16 * %t) {
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call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16* %t)
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ret void
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}
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; CHECK-LABEL: X_ptr:
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; CHECK: foo 1{{$}}
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; CHECK: get_local $push[[S0:[0-9]+]]=, 0{{$}}
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; CHECK-NEXT: get_local $push[[S1:[0-9]+]]=, 1{{$}}
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; CHECK-NEXT: i32.store 0($pop[[S0]]), $pop[[S1]]{{$}}
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define void @X_ptr(i16 ** %t) {
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call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16** %t)
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ret void
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}
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; CHECK-LABEL: funcname:
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; CHECK: foo funcname{{$}}
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define void @funcname() {
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tail call void asm sideeffect "foo $0", "i"(void ()* nonnull @funcname) #0, !srcloc !0
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ret void
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}
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; CHECK-LABEL: varname:
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; CHECK: foo gv+37{{$}}
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@gv = global [0 x i8] zeroinitializer
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define void @varname() {
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tail call void asm sideeffect "foo $0", "i"(i8* getelementptr inbounds ([0 x i8], [0 x i8]* @gv, i64 0, i64 37)) #0, !srcloc !0
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ret void
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}
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; CHECK-LABEL: r_constraint
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; CHECK: i32.const $push[[S0:[0-9]+]]=, 0{{$}}
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; CHECK-NEXT: set_local [[L0:[0-9]+]], $pop[[S0]]{{$}}
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; CHECK-NEXT: i32.const $push[[S1:[0-9]+]]=, 37{{$}}
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; CHECK-NEXT: set_local [[L1:[0-9]+]], $pop[[S1]]{{$}}
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; CHECK: foo [[L2:[0-9]+]], 1, [[L0]], [[L1]]{{$}}
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; CHECK: get_local $push{{[0-9]+}}=, [[L2]]{{$}}
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define hidden i32 @r_constraint(i32 %a, i32 %y) {
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entry:
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%z = bitcast i32 0 to i32
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%t0 = tail call i32 asm "foo $0, $1, $2, $3", "=r,r,r,r"(i32 %y, i32 %z, i32 37) #0, !srcloc !0
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ret i32 %t0
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}
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; CHECK-LABEL: tied_operands
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; CHECK: get_local $push0=, 0
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; CHECK: return $pop0
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define i32 @tied_operands(i32 %var) {
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entry:
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%ret = call i32 asm "", "=r,0"(i32 %var)
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ret i32 %ret
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}
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attributes #0 = { nounwind }
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!0 = !{i32 47}
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!1 = !{i32 145}
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!2 = !{i32 231}
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