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ea85a46c1e
See bug 39331: https://bugs.llvm.org/show_bug.cgi?id=39331 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D58288 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354969 91177308-0d34-0410-b5e6-96231b3b80d8
103 lines
2.0 KiB
C++
103 lines
2.0 KiB
C++
//===-- AMDGPUAsmUtils.cpp - AsmParser/InstPrinter common -----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUAsmUtils.h"
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namespace llvm {
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namespace AMDGPU {
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namespace SendMsg {
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// This must be in sync with llvm::AMDGPU::SendMsg::Id enum members, see SIDefines.h.
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const char* const IdSymbolic[] = {
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nullptr,
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"MSG_INTERRUPT",
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"MSG_GS",
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"MSG_GS_DONE",
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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"MSG_SYSMSG"
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};
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// These two must be in sync with llvm::AMDGPU::SendMsg::Op enum members, see SIDefines.h.
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const char* const OpSysSymbolic[] = {
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nullptr,
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"SYSMSG_OP_ECC_ERR_INTERRUPT",
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"SYSMSG_OP_REG_RD",
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"SYSMSG_OP_HOST_TRAP_ACK",
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"SYSMSG_OP_TTRACE_PC"
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};
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const char* const OpGsSymbolic[] = {
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"GS_OP_NOP",
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"GS_OP_CUT",
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"GS_OP_EMIT",
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"GS_OP_EMIT_CUT"
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};
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} // namespace SendMsg
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namespace Hwreg {
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// This must be in sync with llvm::AMDGPU::Hwreg::ID_SYMBOLIC_FIRST_/LAST_, see SIDefines.h.
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const char* const IdSymbolic[] = {
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nullptr,
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"HW_REG_MODE",
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"HW_REG_STATUS",
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"HW_REG_TRAPSTS",
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"HW_REG_HW_ID",
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"HW_REG_GPR_ALLOC",
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"HW_REG_LDS_ALLOC",
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"HW_REG_IB_STS",
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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nullptr,
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"HW_REG_SH_MEM_BASES"
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};
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} // namespace Hwreg
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namespace Swizzle {
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// This must be in sync with llvm::AMDGPU::Swizzle::Id enum members, see SIDefines.h.
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const char* const IdSymbolic[] = {
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"QUAD_PERM",
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"BITMASK_PERM",
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"SWAP",
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"REVERSE",
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"BROADCAST",
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};
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} // namespace Swizzle
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namespace VGPRIndexMode {
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// This must be in sync with llvm::AMDGPU::VGPRIndexMode::Id enum members, see SIDefines.h.
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const char* const IdSymbolic[] = {
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"SRC0",
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"SRC1",
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"SRC2",
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"DST",
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};
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} // namespace VGPRIndexMode
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} // namespace AMDGPU
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} // namespace llvm
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