mirror of
https://github.com/RPCS3/llvm.git
synced 2025-05-15 18:06:08 +00:00
bb4c357000
Fixes the unwind information generated for floating-point registers. Previously, all padding registers were assumed to be four bytes wide. Now, the width of the register is used to specify the amount of padding. Patch by Jackson Woodruff! Differential revision: https://reviews.llvm.org/D51494 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342545 91177308-0d34-0410-b5e6-96231b3b80d8
16 lines
470 B
LLVM
16 lines
470 B
LLVM
; RUN: llc < %s -mtriple=armv7a-arm-none-eabi | FileCheck %s
|
|
|
|
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
|
|
target triple = "armv7-arm-none-eabi"
|
|
|
|
define void @foo() minsize {
|
|
entry:
|
|
; CHECK: .vsave {[[SAVE_REG:d[0-9]+]]}
|
|
; CHECK-NEXT: .pad #8
|
|
; CHECK-NEXT: vpush {[[PAD_REG:d[0-9]+]], [[SAVE_REG]]}
|
|
; CHECK: vpop {[[PAD_REG]], [[SAVE_REG]]}
|
|
%a = alloca i32, align 4
|
|
call void asm sideeffect "", "r,~{d8}"(i32* %a)
|
|
ret void
|
|
}
|