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a3db7ac345
This change modifies the LLVM ISel lowering settings so that 8-bit/16-bit multiplication is expanded to calls into the compiler runtime library if the MCU being targeted does not support multiplication in hardware. Before this, MUL instructions would be generated on CPUs like the ATtiny85, triggering a CPU reset due to an illegal instruction at runtime. First raised in https://github.com/avr-rust/rust/issues/124. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351523 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
981 B
LLVM
32 lines
981 B
LLVM
; RUN: llc -mattr=avr6 < %s -march=avr | FileCheck %s
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define i1 @signed_multiplication_did_overflow(i8, i8) unnamed_addr {
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; CHECK-LABEL: signed_multiplication_did_overflow:
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entry-block:
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%2 = tail call { i8, i1 } @llvm.smul.with.overflow.i8(i8 %0, i8 %1)
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%3 = extractvalue { i8, i1 } %2, 1
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ret i1 %3
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; Multiply, fill the low byte with the sign of the low byte via
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; arithmetic shifting, compare it to the high byte.
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;
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; CHECK: muls r24, r22
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; CHECK: mov [[HIGH:r[0-9]+]], r1
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; CHECK: mov [[LOW:r[0-9]+]], r0
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; CHECK: asr {{.*}}[[LOW]]
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; CHECK: asr {{.*}}[[LOW]]
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; CHECK: asr {{.*}}[[LOW]]
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; CHECK: asr {{.*}}[[LOW]]
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; CHECK: asr {{.*}}[[LOW]]
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; CHECK: asr {{.*}}[[LOW]]
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; CHECK: asr {{.*}}[[LOW]]
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; CHECK: ldi [[RET:r[0-9]+]], 1
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; CHECK: cp {{.*}}[[HIGH]], {{.*}}[[LOW]]
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; CHECK: brne [[LABEL:LBB[_0-9]+]]
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; CHECK: ldi {{.*}}[[RET]], 0
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; CHECK: {{.*}}[[LABEL]]
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; CHECK: ret
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}
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declare { i8, i1 } @llvm.smul.with.overflow.i8(i8, i8)
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