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Summary: The fX version of floating-point registers only supports single precision. We need to map the name to dX for doubles and qX for long doubles if we want getRegForInlineAsmConstraint() to be able to pick the correct register class. Reviewers: jyknight, venkatra Reviewed By: jyknight Subscribers: eraman, fedor.sergeev, jrtc27, llvm-commits Differential Revision: https://reviews.llvm.org/D47258 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333512 91177308-0d34-0410-b5e6-96231b3b80d8
14 lines
682 B
LLVM
14 lines
682 B
LLVM
; RUN: not llc -march=sparc <%s 2>&1 | FileCheck %s
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; RUN: not llc -march=sparcv9 <%s 2>&1 | FileCheck %s
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; CHECK: error: couldn't allocate input reg for constraint '{f32}'
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; CHECK: error: couldn't allocate input reg for constraint '{f21}'
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; CHECK: error: couldn't allocate input reg for constraint '{f38}'
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define void @test_constraint_float_reg() {
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entry:
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tail call void asm sideeffect "fadds $0,$1,$2", "{f32},{f0},{f0}"(float 6.0, float 7.0, float 8.0)
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tail call void asm sideeffect "faddd $0,$1,$2", "{f21},{f0},{f0}"(double 9.0, double 10.0, double 11.0)
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tail call void asm sideeffect "faddq $0,$1,$2", "{f38},{f0},{f0}"(fp128 0xL0, fp128 0xL0, fp128 0xL0)
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ret void
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}
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