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fd7429c4e7
Summary: If the high part of the load is not used the offset to the next element will not be set correctly. For example, on Sparc V8, the following code will read val2 from offset 4 instead of 8. ``` int val = __builtin_va_arg(va, long long); int val2 = __builtin_va_arg(va, int); ``` Reviewers: jyknight Reviewed By: jyknight Subscribers: fedor.sergeev, jrtc27, llvm-commits Differential Revision: https://reviews.llvm.org/D48595 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337161 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
774 B
LLVM
25 lines
774 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=sparc -disable-sparc-leaf-proc | FileCheck %s
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define i32 @test(i32 %a, i8* %va) nounwind {
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; CHECK-LABEL: test:
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; CHECK: ! %bb.0: ! %entry
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; CHECK-NEXT: save %sp, -96, %sp
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; CHECK-NEXT: add %i1, 8, %i0
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; CHECK-NEXT: st %i0, [%fp+-4]
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; CHECK-NEXT: ld [%i1+4], %i0
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; CHECK-NEXT: add %i1, 12, %i2
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; CHECK-NEXT: st %i2, [%fp+-4]
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; CHECK-NEXT: ld [%i1+8], %i1
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; CHECK-NEXT: ret
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; CHECK-NEXT: restore %i1, %i0, %o0
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entry:
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%va.addr = alloca i8*, align 4
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store i8* %va, i8** %va.addr, align 4
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%0 = va_arg i8** %va.addr, i64
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%conv1 = trunc i64 %0 to i32
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%1 = va_arg i8** %va.addr, i32
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%add3 = add nsw i32 %1, %conv1
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ret i32 %add3
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}
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