Alexandros Lamprineas cbc8a87b84 [InstCombine, ARM] Convert vld1 to llvm load ...

Convert a vector load intrinsic into an llvm load instruction.
This is beneficial when the underlying object being addressed
comes from a constant, since we get constant-folding for free.

Differential Revision: https://reviews.llvm.org/D46273

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333643 91177308-0d34-0410-b5e6-96231b3b80d8

2018-05-31 12:19:18 +00:00

..

2012-04-23-Neon-Intrinsics.ll

InstCombine: Move tests that use target intrinsics into subdirectories

2017-05-13 05:39:46 +00:00

aes-intrinsics.ll

[InstCombine] Combine XOR and AES instructions on ARM/ARM64.

2018-05-24 15:26:42 +00:00

constant-fold-hang.ll

InstCombine: Move tests that use target intrinsics into subdirectories

2017-05-13 05:39:46 +00:00

lit.local.cfg

InstCombine: Move tests that use target intrinsics into subdirectories

2017-05-13 05:39:46 +00:00

neon-intrinsics.ll

InstCombine: Move tests that use target intrinsics into subdirectories

2017-05-13 05:39:46 +00:00

strcmp.ll

…

strcpy.ll

…

tbl1.ll

[InstCombine, ARM, AArch64] Convert table lookup to shuffle vector

2018-05-30 14:38:50 +00:00

vld1.ll

[InstCombine, ARM] Convert vld1 to llvm load

2018-05-31 12:19:18 +00:00