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a551a28baa
The loop vectorizer usually vectorizes any instruction it can and then extracts the elements for a scalarized use. On SystemZ, all elements containing addresses must be extracted into address registers (GRs). Since this extraction is not free, it is better to have the address in a suitable register to begin with. By forcing address arithmetic instructions and loads of addresses to be scalar after vectorization, two benefits result: * No need to extract the register * LSR optimizations trigger (LSR isn't handling vector addresses currently) Benchmarking show improvements on SystemZ with this new behaviour. Any other target could try this by returning false in the new hook prefersVectorizedAddressing(). Review: Renato Golin, Elena Demikhovsky, Ulrich Weigand https://reviews.llvm.org/D32422 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303744 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
2.6 KiB
LLVM
73 lines
2.6 KiB
LLVM
; RUN: opt -S -mtriple=s390x-unknown-linux -mcpu=z13 -loop-vectorize -dce \
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; RUN: -instcombine -force-vector-width=2 < %s | FileCheck %s
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;
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; Test that loop vectorizer does not generate vector addresses that must then
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; always be extracted.
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; Check that the addresses for a scalarized memory access is not extracted
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; from a vector register.
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define i32 @foo(i32* nocapture %A) {
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;CHECK-LABEL: @foo(
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;CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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;CHECK: %0 = shl nsw i64 %index, 2
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;CHECK: %1 = shl i64 %index, 2
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;CHECK: %2 = or i64 %1, 4
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;CHECK: %3 = getelementptr inbounds i32, i32* %A, i64 %0
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;CHECK: %4 = getelementptr inbounds i32, i32* %A, i64 %2
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;CHECK: store i32 4, i32* %3, align 4
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;CHECK: store i32 4, i32* %4, align 4
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entry:
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br label %for.body
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for.body:
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%0 = shl nsw i64 %indvars.iv, 2
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%arrayidx = getelementptr inbounds i32, i32* %A, i64 %0
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store i32 4, i32* %arrayidx, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 10000
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret i32 undef
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}
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; Check that a load of address is scalarized.
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define i32 @foo1(i32* nocapture noalias %A, i32** nocapture %PtrPtr) {
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;CHECK-LABEL: @foo1(
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;CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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;CHECK: %0 = or i64 %index, 1
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;CHECK: %1 = getelementptr inbounds i32*, i32** %PtrPtr, i64 %index
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;CHECK: %2 = getelementptr inbounds i32*, i32** %PtrPtr, i64 %0
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;CHECK: %3 = load i32*, i32** %1, align 8
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;CHECK: %4 = load i32*, i32** %2, align 8
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;CHECK: %5 = load i32, i32* %3, align 4
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;CHECK: %6 = load i32, i32* %4, align 4
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;CHECK: %7 = insertelement <2 x i32> undef, i32 %5, i32 0
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;CHECK: %8 = insertelement <2 x i32> %7, i32 %6, i32 1
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;CHECK: %9 = getelementptr inbounds i32, i32* %A, i64 %index
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;CHECK: %10 = bitcast i32* %9 to <2 x i32>*
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;CHECK: store <2 x i32> %8, <2 x i32>* %10, align 4
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entry:
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br label %for.body
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for.body:
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%ptr = getelementptr inbounds i32*, i32** %PtrPtr, i64 %indvars.iv
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%el = load i32*, i32** %ptr
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%v = load i32, i32* %el
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%arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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store i32 %v, i32* %arrayidx, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 10000
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret i32 undef
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}
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