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https://github.com/RPCS3/llvm.git
synced 2026-08-28 05:10:05 -04:00
Jan Vesely
bf64cb107c
v2: expose using amdgcn prefix Differential Revision: https://reviews.llvm.org/D23511 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290977 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.1 KiB
LLVM
42 lines
1.1 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s
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; GCN-LABEL: {{^}}main:
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; GCN: s_mov_b32 m0, s0
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; VI-NEXT: s_nop 0
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; GCN-NEXT: sendmsg(MSG_GS_DONE, GS_OP_NOP)
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; GCN-NEXT: s_endpgm
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define amdgpu_gs void @main(i32 inreg %a) #0 {
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call void @llvm.amdgcn.s.sendmsg(i32 3, i32 %a)
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ret void
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}
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; GCN-LABEL: {{^}}main_halt:
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; GCN: s_mov_b32 m0, s0
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; VI-NEXT: s_nop 0
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; GCN-NEXT: s_sendmsghalt sendmsg(MSG_INTERRUPT)
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; GCN-NEXT: s_endpgm
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define void @main_halt(i32 inreg %a) #0 {
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call void @llvm.amdgcn.s.sendmsghalt(i32 1, i32 %a)
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ret void
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}
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; GCN-LABEL: {{^}}legacy:
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; GCN: s_mov_b32 m0, s0
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; VI-NEXT: s_nop 0
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; GCN-NEXT: sendmsg(MSG_GS_DONE, GS_OP_NOP)
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; GCN-NEXT: s_endpgm
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define amdgpu_gs void @legacy(i32 inreg %a) #0 {
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call void @llvm.SI.sendmsg(i32 3, i32 %a)
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ret void
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}
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declare void @llvm.amdgcn.s.sendmsg(i32, i32) #0
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declare void @llvm.amdgcn.s.sendmsghalt(i32, i32) #0
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declare void @llvm.SI.sendmsg(i32, i32) #0
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attributes #0 = { nounwind }
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