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https://github.com/RPCS3/llvm.git
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Matt Arsenault
e536396218
------------------------------------------------------------------------ r292982 | arsenm | 2017-01-24 14:02:15 -0800 (Tue, 24 Jan 2017) | 8 lines Enable FeatureFlatForGlobal on Volcanic Islands This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_40@293326 91177308-0d34-0410-b5e6-96231b3b80d8
178 lines
6.4 KiB
LLVM
178 lines
6.4 KiB
LLVM
; RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire < %s | FileCheck %s
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; RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck %s
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; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -mattr=-flat-for-global < %s | FileCheck -check-prefixes=CHECK,HSA %s
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; Disable optimizations in case there are optimizations added that
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; specialize away generic pointer accesses.
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; These testcases might become useless when there are optimizations to
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; remove generic pointers.
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; CHECK-LABEL: {{^}}store_flat_i32:
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; CHECK-DAG: s_load_dwordx2 s{{\[}}[[LO_SREG:[0-9]+]]:[[HI_SREG:[0-9]+]]],
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; CHECK-DAG: s_load_dword s[[SDATA:[0-9]+]],
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; CHECK: s_waitcnt lgkmcnt(0)
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; CHECK-DAG: v_mov_b32_e32 v[[DATA:[0-9]+]], s[[SDATA]]
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; CHECK-DAG: v_mov_b32_e32 v[[LO_VREG:[0-9]+]], s[[LO_SREG]]
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; CHECK-DAG: v_mov_b32_e32 v[[HI_VREG:[0-9]+]], s[[HI_SREG]]
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; CHECK: flat_store_dword v{{\[}}[[LO_VREG]]:[[HI_VREG]]{{\]}}, v[[DATA]]
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define void @store_flat_i32(i32 addrspace(1)* %gptr, i32 %x) #0 {
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%fptr = addrspacecast i32 addrspace(1)* %gptr to i32 addrspace(4)*
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store i32 %x, i32 addrspace(4)* %fptr, align 4
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ret void
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}
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; CHECK-LABEL: {{^}}store_flat_i64:
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; CHECK: flat_store_dwordx2
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define void @store_flat_i64(i64 addrspace(1)* %gptr, i64 %x) #0 {
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%fptr = addrspacecast i64 addrspace(1)* %gptr to i64 addrspace(4)*
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store i64 %x, i64 addrspace(4)* %fptr, align 8
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ret void
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}
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; CHECK-LABEL: {{^}}store_flat_v4i32:
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; CHECK: flat_store_dwordx4
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define void @store_flat_v4i32(<4 x i32> addrspace(1)* %gptr, <4 x i32> %x) #0 {
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%fptr = addrspacecast <4 x i32> addrspace(1)* %gptr to <4 x i32> addrspace(4)*
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store <4 x i32> %x, <4 x i32> addrspace(4)* %fptr, align 16
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ret void
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}
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; CHECK-LABEL: {{^}}store_flat_trunc_i16:
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; CHECK: flat_store_short
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define void @store_flat_trunc_i16(i16 addrspace(1)* %gptr, i32 %x) #0 {
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%fptr = addrspacecast i16 addrspace(1)* %gptr to i16 addrspace(4)*
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%y = trunc i32 %x to i16
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store i16 %y, i16 addrspace(4)* %fptr, align 2
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ret void
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}
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; CHECK-LABEL: {{^}}store_flat_trunc_i8:
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; CHECK: flat_store_byte
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define void @store_flat_trunc_i8(i8 addrspace(1)* %gptr, i32 %x) #0 {
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%fptr = addrspacecast i8 addrspace(1)* %gptr to i8 addrspace(4)*
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%y = trunc i32 %x to i8
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store i8 %y, i8 addrspace(4)* %fptr, align 2
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ret void
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}
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; CHECK-LABEL: load_flat_i32:
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; CHECK: flat_load_dword
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define void @load_flat_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i32 addrspace(1)* %gptr to i32 addrspace(4)*
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%fload = load i32, i32 addrspace(4)* %fptr, align 4
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store i32 %fload, i32 addrspace(1)* %out, align 4
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ret void
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}
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; CHECK-LABEL: load_flat_i64:
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; CHECK: flat_load_dwordx2
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define void @load_flat_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i64 addrspace(1)* %gptr to i64 addrspace(4)*
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%fload = load i64, i64 addrspace(4)* %fptr, align 8
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store i64 %fload, i64 addrspace(1)* %out, align 8
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ret void
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}
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; CHECK-LABEL: load_flat_v4i32:
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; CHECK: flat_load_dwordx4
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define void @load_flat_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast <4 x i32> addrspace(1)* %gptr to <4 x i32> addrspace(4)*
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%fload = load <4 x i32>, <4 x i32> addrspace(4)* %fptr, align 32
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store <4 x i32> %fload, <4 x i32> addrspace(1)* %out, align 8
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ret void
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}
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; CHECK-LABEL: sextload_flat_i8:
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; CHECK: flat_load_sbyte
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define void @sextload_flat_i8(i32 addrspace(1)* noalias %out, i8 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i8 addrspace(1)* %gptr to i8 addrspace(4)*
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%fload = load i8, i8 addrspace(4)* %fptr, align 4
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%ext = sext i8 %fload to i32
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store i32 %ext, i32 addrspace(1)* %out, align 4
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ret void
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}
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; CHECK-LABEL: zextload_flat_i8:
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; CHECK: flat_load_ubyte
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define void @zextload_flat_i8(i32 addrspace(1)* noalias %out, i8 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i8 addrspace(1)* %gptr to i8 addrspace(4)*
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%fload = load i8, i8 addrspace(4)* %fptr, align 4
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%ext = zext i8 %fload to i32
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store i32 %ext, i32 addrspace(1)* %out, align 4
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ret void
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}
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; CHECK-LABEL: sextload_flat_i16:
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; CHECK: flat_load_sshort
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define void @sextload_flat_i16(i32 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i16 addrspace(1)* %gptr to i16 addrspace(4)*
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%fload = load i16, i16 addrspace(4)* %fptr, align 4
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%ext = sext i16 %fload to i32
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store i32 %ext, i32 addrspace(1)* %out, align 4
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ret void
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}
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; CHECK-LABEL: zextload_flat_i16:
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; CHECK: flat_load_ushort
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define void @zextload_flat_i16(i32 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i16 addrspace(1)* %gptr to i16 addrspace(4)*
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%fload = load i16, i16 addrspace(4)* %fptr, align 4
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%ext = zext i16 %fload to i32
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store i32 %ext, i32 addrspace(1)* %out, align 4
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ret void
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}
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; CHECK-LABEL: flat_scratch_unaligned_load:
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; CHECK: flat_load_ubyte
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; CHECK: flat_load_ubyte
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; CHECK: flat_load_ubyte
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; CHECK: flat_load_ubyte
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define void @flat_scratch_unaligned_load() {
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%scratch = alloca i32
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%fptr = addrspacecast i32* %scratch to i32 addrspace(4)*
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%ld = load volatile i32, i32 addrspace(4)* %fptr, align 1
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ret void
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}
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; CHECK-LABEL: flat_scratch_unaligned_store:
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; CHECK: flat_store_byte
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; CHECK: flat_store_byte
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; CHECK: flat_store_byte
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; CHECK: flat_store_byte
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define void @flat_scratch_unaligned_store() {
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%scratch = alloca i32
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%fptr = addrspacecast i32* %scratch to i32 addrspace(4)*
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store volatile i32 0, i32 addrspace(4)* %fptr, align 1
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ret void
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}
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; CHECK-LABEL: flat_scratch_multidword_load:
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; HSA: flat_load_dword
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; HSA: flat_load_dword
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; FIXME: These tests are broken for os = mesa3d, becasue it doesn't initialize flat_scr
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define void @flat_scratch_multidword_load() {
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%scratch = alloca <2 x i32>
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%fptr = addrspacecast <2 x i32>* %scratch to <2 x i32> addrspace(4)*
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%ld = load volatile <2 x i32>, <2 x i32> addrspace(4)* %fptr
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ret void
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}
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; CHECK-LABEL: flat_scratch_multidword_store:
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; HSA: flat_store_dword
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; HSA: flat_store_dword
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; FIXME: These tests are broken for os = mesa3d, becasue it doesn't initialize flat_scr
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define void @flat_scratch_multidword_store() {
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%scratch = alloca <2 x i32>
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%fptr = addrspacecast <2 x i32>* %scratch to <2 x i32> addrspace(4)*
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store volatile <2 x i32> zeroinitializer, <2 x i32> addrspace(4)* %fptr
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind convergent }
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attributes #3 = { nounwind readnone }
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